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SN74ABT32245PZ PDF预览

SN74ABT32245PZ

更新时间: 2024-11-12 02:58:27
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德州仪器 - TI 信息通信管理输出元件逻辑集成电路
页数 文件大小 规格书
8页 133K
描述
36-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

SN74ABT32245PZ 数据手册

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SN54ABT32245, SN74ABT32245  
36-BIT BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCBS228C – JUNE 1992 – APRIL 1995  
Members of the Texas Instruments  
Distributed V  
and GND Pin Configuration  
CC  
Widebus+ Family  
Minimizes High-Speed Switching Noise  
High-Drive Outputs (32-mA I  
State-of-the-Art EPIC-ΙΙB BiCMOS Design  
,
OH  
Significantly Reduces Power Dissipation  
64-mA I  
)
OL  
Latch-Up Performance Exceeds 500 mA  
Bus-Hold Inputs Eliminate the Need for  
Per JEDEC Standard JESD-17  
External Pullup Resistors  
Typical V  
(Output Ground Bounce)  
Packaged in 100-Pin Plastic Thin Quad  
Flat (PZ) Package With 14 × 14-mm Body  
Using 0.5-mm Lead Pitch  
OLP  
< 0.8 V at V  
= 5 V, T = 25°C  
CC  
A
SN74ABT32245 . . . PZ PACKAGE  
(TOP VIEW)  
1009998 9796 959493 92 9190 89 8887 86 8584 83 8281 8079 7877 76  
1A9  
2A1  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
75  
74  
73  
72  
71  
70  
69  
68  
67  
66  
65  
64  
63  
62  
61  
60  
59  
58  
57  
56  
55  
54  
53  
52  
51  
1B9  
2B1  
GND  
2B2  
2B3  
2B4  
2B5  
GND  
2B6  
2B7  
2B8  
2B9  
GND  
2A2  
2A3  
2A4  
2A5  
GND  
2A6  
2A7  
2A8  
2A9  
V
V
CC  
CC  
3A1  
3A2  
3A3  
3A4  
GND  
3A5  
3A6  
3A7  
3A8  
GND  
3A9  
4A1  
3B1  
3B2  
3B3  
3B4  
GND  
3B5  
3B6  
3B7  
3B8  
GND  
3B9  
4B1  
26 272829 3031 32 33 343536 3738 3940 4142 43 4445 46 474849 50  
description  
The ABT32245 are 36-bit (quad 9-bit) noninverting 3-state transceivers designed for synchronous two-way  
communication between data buses. The control-function implementation minimizes external timing  
requirements.  
These devices can be used as four 9-bit transceivers, two18-bit transceivers, or one 36-bit transceiver. They  
allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic  
level at the direction-control (DIR) inputs. The output-enable (OE) inputs can be used to disable the device so  
that the buses are effectively isolated.  
Widebus+ and EPIC-ΙΙB are trademarks of Texas Instruments Incorporated.  
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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