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SN74ABT2952DB PDF预览

SN74ABT2952DB

更新时间： 2024-11-11 20:54:15
品牌 Logo 应用领域
德州仪器 - TI 信息通信管理光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
7页 108K
描述
ABT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, PLASTIC, SSOP-24

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SN74ABT2952DB 技术参数

生命周期：Obsolete零件包装代码：SSOP
包装说明：SSOP,针数：24
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.49其他特性：INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; CLOCK ENABLE
系列：ABTJESD-30 代码：R-PDSO-G24
长度：8.2 mm负载电容（CL）：50 pF
逻辑集成电路类型：REGISTERED BUS TRANSCEIVER位数：8
功能数量：1端口数量：2
端子数量：24最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, SHRINK PITCH最大电源电流（ICC）：35 mA
认证状态：Not Qualified座面最大高度：2 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：BICMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL宽度：5.3 mm
Base Number Matches：1

SN74ABT2952DB 数据手册

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SN54ABT2952, SN74ABT2952  
OCTAL BUS TRANSCEIVERS AND REGISTERS  
WITH 3-STATE OUTPUTS  
SCBS202 – NOVEMBER 1990 – REVISED OCTOBER 1992  
SN54ABT2952 . . . JT PACKAGE  
SN74ABT2952 . . . DB, DW, OR NT PACKAGE  
(TOP VIEW)  
• State-of-the-Art EPIC-ΙΙB BiCMOS Design  
Significantly Reduces Power Dissipation  
• ESD Protection Exceeds 2000 V Per  
MIL-STD-883C, Method 3015; Exceeds  
200 V Using Machine Model (C = 200 pF,  
R = 0)  
B8  
B7  
B6  
B5  
B4  
B3  
B2  
B1  
V
CC  
1
2
3
4
5
6
7
8
9
24  
23  
22  
21  
20  
19  
18  
17  
16  
A8  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
• Latch-Up Performance Exceeds 500 mA  
Per JEDEC Standard JESD-17  
• Two 8-Bit Back-to-Back Registers Store  
Data Flowing in Both Directions  
• Noninverting Outputs  
OEAB  
• Typical V  
(Output Ground Bounce)  
OLP  
CC  
CLKAB 10  
15 OEBA  
< 1 V at V  
= 5 V, T = 25°C  
A
CLKENAB  
GND  
CLKBA  
CLKENBA  
11  
12  
14  
13  
• Package Options Include Plastic  
Small-Outline (SOIC) and Shrink  
Small-Outline (SSOP) Packages, Ceramic  
Chip Carriers, and Plastic and Ceramic  
DIPs  
SN54ABT2952 . . . FK PACKAGE  
(TOP VIEW)  
description  
The ′ABT2952 consists of two 8-bit back-to-back  
registers that store data flowing in both directions  
between two bidirectional buses. Data on the A or  
B bus is stored in the registers on the low-to-high  
transition of the clock (CLKAB or CLKBA) input  
provided that the clock-enable (CLKENAB or  
CLKENBA) input is low. Taking the output-enable  
(OEAB or OEBA) input low accesses the data on  
either port.  
4
3
2
1
28 27 26  
25  
5
B5  
B4  
B3  
NC  
B2  
A6  
A5  
A4  
6
24  
23  
7
8
22 NC  
21 A3  
20 A2  
19 A1  
9
10  
11  
B1  
OEAB  
12 13 14 15 16 17 18  
To ensure the high-impedance state during power  
up or power down, OE should be tied to V  
CC  
throughapullupresistor;theminimumvalueofthe  
resistor is determined by the current-sinking  
capability of the driver.  
NC – No internal connection  
The SN74ABT2952 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count  
and functionality of standard small-outline packages in less than half the printed-circuit-board area.  
The SN54ABT2952 is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74ABT2952 is characterized for operation from –40°C to 85°C.  
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.  
Copyright 1992, Texas Instruments Incorporated  
PRODUCT PREVIEW information concerns products in the formative or  
design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right to  
change or discontinue these products without notice.  
2–1  
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567

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SN74ABT2952DW TI

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SN74ABT2953DBR TI

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SN74ABT2953DW TI

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 		ABT SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24
SN74ABT2953DWR TI

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 		ABT SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24
SN74ABT2953NT TI

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 		ABT SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDIP24
SN74ABT32245 TI

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 		36-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74ABT32245PZ TI

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 		36-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

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