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SN54LVCH244A-SP

更新时间： 2024-11-05 11:07:07
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德州仪器 - TI /
页数 文件大小 规格书
23页 665K
描述
具有总线保持和三态输出的航天类 8 通道、2V 至 3.6V 缓冲器

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SN54LVCH244A-SP 数据手册

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SN54LVCH244A, SN74LVCH244A  
OCTAL BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES009O–JULY 1995–REVISED FEBRUARY 2007  
FEATURES  
•
•
•
•
Operate From 1.65 V to 3.6 V  
Inputs Accept Voltages to 5.5 V  
Max tpd of 5.9 ns at 3.3 V  
•
•
•
•
Ioff Supports Partial-Power-Down Mode  
Operation  
Bus Hold on Data Inputs Eliminates the Need  
for External Pullup/Pulldown Resistors  
Typical VOLP (Output Ground Bounce)  
<0.8 V at VCC = 3.3 V, TA = 25°C  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
•
•
Typical VOHV (Output VOH Undershoot)  
>2 V at VCC = 3.3 V, TA = 25°C  
ESD Protection Exceeds JESD 22  
–
–
–
2000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
Support Mixed-Mode Signal Operation on All  
Ports  
(5-V Input/Output Voltage With 3.3-V VCC  
)
1000-V Charged-Device Model (C101)  
SN54LVCH244A . . . J OR W PACKAGE  
SN74LVCH244A . . . DB, DBQ, DGV, DW,  
NS, OR PW PACKAGE  
SN74LVCH244A . . . RGY PACKAGE  
(TOP VIEW)  
SN54LVCH244A . . . FK PACKAGE  
(TOP VIEW)  
(TOP VIEW)  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
1OE  
1A1  
2Y4  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2Y1  
GND  
V
CC  
1
20  
3
9
2
1
20 19  
18  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2OE  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
2A2  
1Y4  
2A1  
4
5
6
7
8
19  
18  
17  
16  
15  
14  
13  
12  
2
3
4
5
6
7
8
9
1A1  
2Y4  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2Y1  
2OE  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
2A2  
1Y4  
17  
16  
15  
14  
10 11 12 13  
10  
11  
DESCRIPTION/ORDERING INFORMATION  
The SN54LVCH244A octal buffer/line driver is designed for 2.7-V to 3.6-V VCC operation, and the  
SN74LVCH244A octal buffer/line driver is designed for 1.65-V to 3.6-V VCC operation.  
These devices are organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is low,  
these devices pass data from the A inputs to the Y outputs. When OE is high, the outputs are in the  
high-impedance state.  
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown  
resistors with the bus-hold circuitry is not recommended.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators  
in a mixed 3.3-V/5-V system environment.  
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the  
outputs, preventing damaging current backflow through the devices when they are powered down.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1995–2007, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...23

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