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SN54LVCH244AW PDF预览

SN54LVCH244AW

更新时间： 2024-11-03 23:03:07
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德州仪器 - TI 驱动器输出元件
页数 文件大小 规格书
9页 129K
描述
OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

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SN54LVCH244AW 数据手册

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SN54LVCH244A, SN74LVCH244A  
OCTAL BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCES009G – JULY 1995 - REVISED JUNE 1998  
SN54LVCH244A . . . J OR W PACKAGE  
SN74LVCH244A . . . DB, DW, OR PW PACKAGE  
(TOP VIEW)  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
OLP  
= 3.3 V, T = 25°C  
CC  
A
1OE  
1A1  
2Y4  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2Y1  
V
CC  
1
2
3
4
5
6
7
8
9
20  
19  
18  
17  
16  
15  
14  
Typical V  
> 2 V at V  
(Output V  
Undershoot)  
2OE  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
OHV  
CC  
OH  
= 3.3 V, T = 25°C  
A
Power Off Disables Outputs, Permitting  
Live Insertion  
Support Mixed-Mode Signal Operation on  
All Ports (5-V Input/Output Voltage With  
13 2A2  
12 1Y4  
11 2A1  
3.3-V V  
)
CC  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
GND 10  
SN54LVCH244A . . . FK PACKAGE  
(TOP VIEW)  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
3
2
1 20 19  
18  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
1A2  
2Y3  
1A3  
2Y2  
1A4  
4
5
6
7
8
Package Options Include Plastic  
17  
16  
15  
14  
Small-Outline (DW), Shrink Small-Outline  
(DB), and Thin Shrink Small-Outline (PW)  
Packages, Ceramic Flat (W) Package,  
Ceramic Chip Carriers (FK), and DIPs (J)  
9 10 11 12 13  
description  
The SN54LVCH244A octal buffer/line driver is designed for 2.7-V to 3.6-V V  
operation and the  
CC  
SN74LVCH244A octal buffer/line driver is designed for 1.65-V to 3.6-V V  
operation.  
CC  
These devices are organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is low,  
these devices pass data from the A inputs to the Y outputs. When OE is high, the outputs are in the  
high-impedance state.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators  
in a mixed 3.3-V/5-V system environment.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
The SN54LVCH244A is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74LVCH244A is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1998, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...9

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