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SN54LVC08AFK PDF预览

SN54LVC08AFK

更新时间： 2024-11-25 22:38:35
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德州仪器 - TI 输入元件
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8页 114K
描述
QUADRUPLE 2-INPUT POSITIVE-AND GATES

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SN54LVC08AFK 技术参数

生命周期：Obsolete零件包装代码：QLCC
包装说明：CERAMIC, LCC-20针数：20
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.55系列：LVC/LCX/Z
JESD-30 代码：S-CQCC-N20长度：8.89 mm
逻辑集成电路类型：AND GATE功能数量：4
输入次数：2端子数量：20
最高工作温度：125 °C最低工作温度：-55 °C
封装主体材料：CERAMIC, METAL-SEALED COFIRED封装代码：QCCN
封装形状：SQUARE封装形式：CHIP CARRIER
传播延迟（tpd）：4.8 ns认证状态：Not Qualified
座面最大高度：2.03 mm最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：2 V标称供电电压 (Vsup)：2.7 V
表面贴装：YES技术：CMOS
温度等级：MILITARY端子形式：NO LEAD
端子节距：1.27 mm端子位置：QUAD
宽度：8.89 mm

SN54LVC08AFK 数据手册

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SN54LVC08A, SN74LVC08A  
QUADRUPLE 2-INPUT POSITIVE-AND GATES  
SCAS283G – JANUARY 1993 – REVISED JUNE 1998  
SN54LVC08A . . . J OR W PACKAGE  
SN74LVC08A . . . D, DB, OR PW PACKAGE  
(TOP VIEW)  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
1A  
1B  
1Y  
2A  
2B  
V
CC  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
4B  
4A  
4Y  
3B  
3A  
3Y  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
OLP  
2Y  
GND  
= 3.3 V, T = 25°C  
CC  
A
8
Typical V  
> 2 V at V  
(Output V  
Undershoot)  
OHV  
CC  
OH  
= 3.3 V, T = 25°C  
A
Inputs Accept Voltages to 5.5 V  
SN54LVC08A . . . FK PACKAGE  
(TOP VIEW)  
Package Options Include Plastic  
Small-Outline (D), Shrink Small-Outline  
(DB), and Thin Shrink Small-Outline (PW)  
Packages, Ceramic Chip Carriers (FK) and  
Flat (W) Packages, and DIPs (J)  
3
2
1
20 19  
18  
4A  
NC  
4Y  
1Y  
NC  
2A  
4
5
6
7
8
17  
16  
description  
15 NC  
14  
9 10 11 12 13  
NC  
2B  
The SN54LVC08A quadruple 2-input positive-  
3B  
AND gate is designed for 2.7-V to 3.6-V V  
CC  
operation and the SN74LVC08A quadruple  
2-input positive-AND gate is designed for 1.65-V  
to 3.6-V V  
operation.  
CC  
NC – No internal connection  
The ’LVC08A devices perform the Boolean  
Y
A • B or Y  
A
B
in positive  
function  
logic.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators  
in a mixed 3.3-V/5-V system environment.  
The SN54LVC08A is characterized for operation over the full military temperature range of –55°C to 125°C. The  
SN74LVC08A is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
(each gate)  
INPUTS  
OUTPUT  
Y
A
B
H
X
L
H
L
H
L
L
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1998, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
12345678

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