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SN54HC175FKR PDF预览

SN54HC175FKR

更新时间: 2024-11-02 13:13:43
品牌 Logo 应用领域
德州仪器 - TI 触发器
页数 文件大小 规格书
6页 96K
描述
HC/UH SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CQCC20, CERAMIC, LCC-20

SN54HC175FKR 技术参数

生命周期:Obsolete零件包装代码:QLCC
包装说明:QCCN,针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.6系列:HC/UH
JESD-30 代码:S-CQCC-N20长度:8.89 mm
负载电容(CL):50 pF逻辑集成电路类型:D FLIP-FLOP
位数:4功能数量:1
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出极性:COMPLEMENTARY
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:QCCN
封装形状:SQUARE封装形式:CHIP CARRIER
传播延迟(tpd):255 ns认证状态:Not Qualified
座面最大高度:2.03 mm最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子形式:NO LEAD
端子节距:1.27 mm端子位置:QUAD
触发器类型:POSITIVE EDGE宽度:8.89 mm
最小 fmax:25 MHzBase Number Matches:1

SN54HC175FKR 数据手册

 浏览型号SN54HC175FKR的Datasheet PDF文件第2页浏览型号SN54HC175FKR的Datasheet PDF文件第3页浏览型号SN54HC175FKR的Datasheet PDF文件第4页浏览型号SN54HC175FKR的Datasheet PDF文件第5页浏览型号SN54HC175FKR的Datasheet PDF文件第6页 
SN54HC175, SN74HC175  
QUADRUPLE D-TYPE FLIP-FLOPS  
WITH CLEAR  
SCLS299A – JANUARY 1996 – REVISED MAY 1997  
SN54HC175 . . . J OR W PACKAGE  
SN74HC175 . . . D, N, OR PW PACKAGE  
(TOP VIEW)  
Contain Four Flip-Flops With Double-Rail  
Outputs  
Applications Include:  
– Buffer/Storage Registers  
– Shift Registers  
CLR  
1Q  
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
4Q  
4Q  
4D  
3D  
3Q  
3Q  
CLK  
– Pattern Generators  
1Q  
1D  
Package Options Include Plastic  
Small-Outline (D), Thin Shrink  
Small-Outline (PW), and Ceramic Flat (W)  
Packages, Ceramic Chip Carriers (FK), and  
Standard Plastic (N) and Ceramic (J)  
300-mil DIPs  
2D  
2Q  
2Q  
GND  
SN54HC175 . . . FK PACKAGE  
(TOP VIEW)  
description  
These monolithic positive-edge-triggered D-type  
flip-flops have a direct clear (CLR) input. The  
’HC175 feature complementary outputs from  
each flip-flop.  
3
2
1
20 19  
18 4Q  
1Q  
1D  
NC  
2D  
2Q  
4
5
6
7
8
17  
16  
15  
14  
4D  
NC  
3D  
3Q  
Information at the data (D) inputs meeting the  
setup time requirements is transferred to the  
outputs on the positive-going edge of the clock  
(CLK) pulse. Clock triggering occurs at a  
particular voltage level and is not directly related  
to the transition time of the positive-going edge of  
CLK. When CLK is at either the high or low level,  
the D input has no effect at the output.  
9 10 11 12 13  
NC – No internal connection  
The SN54HC175 is characterized for operation  
over the full military temperature range of –55°C  
to 125°C. The SN74HC175 is characterized for  
operation from –40°C to 85°C.  
FUNCTION TABLE  
(each flip-flop)  
INPUTS OUTPUTS  
CLR  
L
CLK  
D
X
H
L
Q
L
Q
H
L
X
H
H
L
H
H
H
L
X
Q
Q
0
0
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1997, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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