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SN54HC193WR

更新时间： 2024-11-25 13:13:43
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德州仪器 - TI 计数器时钟
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SN54HC193WR 数据手册

 浏览型号SN54HC193WR的Datasheet PDF文件第2页浏览型号SN54HC193WR的Datasheet PDF文件第3页浏览型号SN54HC193WR的Datasheet PDF文件第4页浏览型号SN54HC193WR的Datasheet PDF文件第5页浏览型号SN54HC193WR的Datasheet PDF文件第6页浏览型号SN54HC193WR的Datasheet PDF文件第7页 
SN54HC193, SN74HC193  
4-BIT SYNCHRONOUS UP/DOWN COUNTERS  
(DUAL CLOCK WITH CLEAR)  
SCLS122B – DECEMBER 1982 – REVISED MAY 1997  
SN54HC193 . . . J OR W PACKAGE  
SN74HC193 . . . D OR N PACKAGE  
(TOP VIEW)  
Look-Ahead Circuitry Enhances Cascaded  
Counters  
Fully Synchronous in Count Modes  
B
V
A
Parallel Asynchronous Load for Modulo-N  
Count Lengths  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
CC  
Q
B
A
Q
CLR  
BO  
Asynchronous Clear  
DOWN  
UP  
Package Options Include Plastic  
Small-Outline (D) and Ceramic Flat (W)  
Packages, Ceramic Chip Carriers (FK), and  
Standard Plastic (N) and Ceramic (J)  
300-mil DIPs  
12 CO  
11  
10  
9
Q
Q
LOAD  
C
D
C
D
GND  
description  
SN54HC193 . . . FK PACKAGE  
(TOP VIEW)  
The ’HC193 are 4-bit synchronous, reversible,  
up/down binary counters. Synchronous operation  
is provided by having all flip-flops clocked  
simultaneously so that the outputs change  
coincidentally with each other when so instructed  
by the steering logic. This mode of operation  
eliminates the output counting spikes normally  
associated with asynchronous (ripple-clock)  
counters.  
3
2
1
20 19  
18  
CLR  
BO  
Q
4
5
6
7
8
A
DOWN  
NC  
17  
16  
NC  
15 CO  
14  
9 10 11 12 13  
UP  
LOAD  
Q
C
The outputs of the four flip-flops are triggered on  
a low-to-high-level transition of either count  
(clock) input (UP or DOWN). The direction of  
counting is determined by which count input is  
pulsed while the other count input is high.  
NC – No internal connection  
All four counters are fully programmable; that is, each output may be preset to either level by placing a low on  
the load (LOAD) input and entering the desired data at the data inputs. The output changes to agree with the  
data inputs independently of the count pulses. This feature allows the counters to be used as modulo-N dividers  
by simply modifying the count length with the preset inputs.  
A clear (CLR) input has been provided that forces all outputs to the low level when a high level is applied. The  
clear function is independent of the count and LOAD inputs.  
These counters were designed to be cascaded without the need for external circuitry. The borrow (BO) output  
produces a low-level pulse while the count is zero (all outputs low) and DOWN is low. Similarly, the carry (CO)  
output produces a low-level pulse while the count is maximum (9 or 15) and UP is low. The counters can then  
be easily cascaded by feeding BO and CO to DOWN and UP, respectively, of the succeeding counter.  
The SN54HC193 is characterized for operation over the full military temperature range of –55°C to 125°C. The  
SN74HC193 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1997, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...9

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