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SN54BCT29825FK PDF预览

SN54BCT29825FK

更新时间： 2024-09-08 20:00:07
品牌 Logo 应用领域
德州仪器 - TI 驱动信息通信管理输出元件逻辑集成电路触发器
页数 文件大小 规格书
7页 96K
描述
BCT/FBT SERIES, 8-BIT DRIVER, TRUE OUTPUT, CQCC28

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SN54BCT29825FK 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：QCCN, LCC28,.45SQReach Compliance Code：not_compliant
HTS代码：8542.39.00.01风险等级：5.92
其他特性：WITH CLEAR AND CLOCK ENABLE; WITH TRIPLE OUTPUT ENABLE系列：BCT/FBT
JESD-30 代码：S-CQCC-N28长度：11.43 mm
负载电容（CL）：50 pF逻辑集成电路类型：BUS DRIVER
最大频率@ Nom-Sup：125000000 Hz最大I（ol）：0.024 A
位数：8功能数量：1
端口数量：2端子数量：28
最高工作温度：125 °C最低工作温度：-55 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：CERAMIC, METAL-SEALED COFIRED封装代码：QCCN
封装等效代码：LCC28,.45SQ封装形状：SQUARE
封装形式：CHIP CARRIER峰值回流温度（摄氏度）：NOT SPECIFIED
电源：5 V最大电源电流（ICC）：40 mA
Prop。Delay @ Nom-Sup：9.9 ns传播延迟（tpd）：9.1 ns
认证状态：Not Qualified座面最大高度：2.03 mm
子类别：FF/Latches最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：BICMOS
温度等级：MILITARY端子形式：NO LEAD
端子节距：1.27 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED触发器类型：POSITIVE EDGE
宽度：11.43 mmBase Number Matches：1

SN54BCT29825FK 数据手册

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SN54BCT29825, SN74BCT29825  
8-BIT BUS-INTERFACE FLIP-FLOPS  
WITH 3-STATE OUTPUTS  
SCBS075A – SEPTEMBER 1991 – REVISED NOVEMBER 1993  
SN54BCT29825 . . . JT OR W PACKAGE  
SN74BCT29825 . . . DW OR NT PACKAGE  
(TOP VIEW)  
• State-of-the-Art BiCMOS Design  
Significantly Reduces I  
CCZ  
• ESD Protection Exceeds 2000 V Per  
MIL-STD-883C, Method 3015; Exceeds  
200 V Using Machine Model (C = 200 pF,  
R = 0)  
OE1  
OE2  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
V
CC  
1
2
3
4
5
6
7
8
9
24  
23  
22  
21  
20  
19  
18  
17  
16  
OE3  
1Q  
2Q  
3Q  
4Q  
5Q  
6Q  
7Q  
• 3-State Buffer-Type Outputs Drive Bus  
Lines Directly  
• Package Options Include Plastic  
Small-Outline Packages (DW), Ceramic Chip  
Carriers (FK) and Flatpacks (W), and  
Standard Plastic and Ceramic 300-mil DIPs  
(JT, NT)  
8D 10  
15 8Q  
CLR  
GND  
CLKEN  
CLK  
11  
12  
14  
13  
description  
These 8-bit bus-interface flip-flops feature 3-state  
outputs designed specifically for driving highly  
capacitive or relatively low-impedance loads.  
They are particularly suitable for implementing  
wider buffer registers, I/O ports, bidirectional bus  
drivers with parity, and working registers.  
SN54BCT29825 . . . FK PACKAGE  
(TOP VIEW)  
4
3
2
1 28 27 26  
25  
The eight flip-flops are edge-triggered D-type  
flip-flops. With the clock-enable (CLKEN) input  
low, the device enters data on the low-to-high  
transition of the clock. Taking CLKEN high  
disablestheclockbuffer, thuslatchingtheoutputs.  
Taking the clear (CLR) input low causes the eight  
Q outputs to go low independently of the clock.  
5
6
7
8
9
2Q  
3Q  
4Q  
2D  
3D  
4D  
NC  
5D  
6D  
7D  
24  
23  
22 NC  
21 5Q  
20 6Q  
19 7Q  
10  
11  
12 13 14 15 16 17 18  
Buffered output-enable (OE1, OE2, or OE3)  
inputs can be used to place the eight outputs in  
either a normal logic state (high or low) or a  
high-impedance state. In the high-impedance  
state, the outputs neither load nor drive the bus  
lines significantly. The high-impedance state and  
increased drive provide the capability to drive bus  
lines without need for interface or pullup  
components.  
NC – No internal connection  
The output-enable inputs do not affect the internal  
operationoftheflip-flops. Olddatacanberetained  
or new data can be entered while the outputs are  
in the high-impedance state.  
The SN54BCT29825 is characterized for opera-  
tion over the full military temperature range of  
–55°C to 125°C. The SN74BCT29825 is  
characterized for operation from 0°C to 70°C.  
Copyright 1993, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
2–1  
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567

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