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SN54ALS541FK PDF预览

SN54ALS541FK

更新时间: 2024-11-05 22:36:35
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路输出元件
页数 文件大小 规格书
16页 510K
描述
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS

SN54ALS541FK 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QLCC包装说明:QCCN, LCC20,.35SQ
针数:20Reach Compliance Code:not_compliant
ECCN代码:3A001.A.2.CHTS代码:8542.39.00.01
风险等级:5.78其他特性:WITH DUAL OUTPUT ENABLE
控制类型:ENABLE LOW系列:ALS
JESD-30 代码:S-CQCC-N20长度:8.89 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.012 A位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:QCCN封装等效代码:LCC20,.35SQ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
最大电源电流(ICC):25 mAProp。Delay @ Nom-Sup:17 ns
传播延迟(tpd):14 ns认证状态:Not Qualified
座面最大高度:2.03 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:MILITARY
端子形式:NO LEAD端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:8.89 mmBase Number Matches:1

SN54ALS541FK 数据手册

 浏览型号SN54ALS541FK的Datasheet PDF文件第2页浏览型号SN54ALS541FK的Datasheet PDF文件第3页浏览型号SN54ALS541FK的Datasheet PDF文件第4页浏览型号SN54ALS541FK的Datasheet PDF文件第5页浏览型号SN54ALS541FK的Datasheet PDF文件第6页浏览型号SN54ALS541FK的Datasheet PDF文件第7页 
SN54ALS541, SN74ALS540, SN74ALS541  
OCTAL BUFFERS AND LINE DRIVERS  
WITH 3-STATE OUTPUTS  
SDAS025D – APRIL 1982 – REVISED MARCH 2002  
SN54ALS541 . . . J PACKAGE  
SN74ALS540 . . . DW, N, OR NS PACKAGE  
SN74ALS541 . . . DB, DW, N, OR NS PACKAGE  
(TOP VIEW)  
3-State Outputs Drive Bus Lines or Buffer  
Memory Address Registers  
pnp Inputs Reduce dc Loading  
Data Flowthrough Pinout (All Inputs on  
Opposite Side From Outputs)  
OE1  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
OE2  
Y1  
Y2  
Y3  
Y4  
Y5  
Y6  
Y7  
Y8  
description  
These octal buffers and line drivers are designed  
to have the performance of the popular  
SN54ALS240A/SN74ALS240A series and, at  
the same time, offer a pinout with inputs and  
outputs on opposite sides of the package. This  
arrangement greatly facilitates printed circuit  
board layout.  
GND  
The 3-state control gate is a 2-input NOR gate  
such that, if either output-enable (OE1 or OE2)  
input is high, all eight outputs are in the  
high-impedance state.  
SN54ALS541 . . . FK PACKAGE  
(TOP VIEW)  
The SN74ALS540 provides inverted data. The  
’ALS541 provide true data at the outputs.  
3
2
1
20 19  
18  
Y1  
Y2  
Y3  
Y4  
Y5  
A3  
A4  
A5  
A6  
A7  
4
5
6
7
8
17  
16  
15  
14  
The -1 versions of SN74ALS540 and  
SN74ALS541 are identical to the standard  
versions, except that the recommended  
maximum I is increased to 48 mA. There is no  
OL  
9 10 11 12 13  
-1 version of the SN54ALS541.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2002, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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