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SN54ABT16241A_15

更新时间： 2024-11-14 02:58:43
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德州仪器 - TI 驱动输出元件
页数 文件大小 规格书
7页 109K
描述
16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

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SN54ABT16241A_15 数据手册

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SN54ABT16241A, SN74ABT16241A  
16-BIT BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCBS096G – FEBRUARY 1991 – REVISED OCTOBER 1998  
SN54ABT16241A . . . WD PACKAGE  
SN74ABT16241A . . . DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
Members of the Texas Instruments  
Widebus Family  
State-of-the-Art EPIC-ΙΙB BiCMOS Design  
Significantly Reduces Power Dissipation  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1OE  
1Y1  
1Y2  
GND  
1Y3  
1Y4  
2OE  
1A1  
1A2  
GND  
1A3  
1A4  
Typical V  
(Output Ground Bounce) < 1 V  
2
OLP  
at V  
= 5 V, T = 25°C  
3
CC  
A
4
Distributed V  
Minimizes High-Speed Switching Noise  
and GND Pin Configuration  
CC  
5
6
Flow-Through Architecture Optimizes PCB  
Layout  
7
V
V
CC  
CC  
8
2Y1  
2Y2  
GND  
2Y3  
2Y4  
3Y1  
3Y2  
GND  
3Y3  
3Y4  
2A1  
2A2  
GND  
2A3  
2A4  
3A1  
3A2  
GND  
3A3  
3A4  
High-Drive Outputs (–32-mA I , 64-mA I  
OH  
)
OL  
9
Latch-Up Performance Exceeds 500 mA  
Per JESD 17  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL), Thin Shrink  
Small-Outline (DGG), and Thin Very  
Small-Outline (DGV) Packages and 380-mil  
Fine-Pitch Ceramic Flat (WD) Package  
Using 25-mil Center-to-Center Spacings  
V
V
CC  
CC  
4Y1  
4Y2  
GND  
4Y3  
4Y4  
4OE  
4A1  
4A2  
GND  
4A3  
4A4  
3OE  
description  
The ’ABT16241A devices are 16-bit buffers and  
line drivers designed specifically to improve both  
the performance and density of 3-state memory  
address drivers, clock drivers, and bus-oriented  
receivers and transmitters.  
These devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. These devices provide  
true outputs and complementary output-enable (OE and OE) inputs.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. OE  
should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the  
current-sourcing capability of the driver.  
The SN54ABT16241A is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74ABT16241A is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus and EPIC-ΙΙB are trademarks of Texas Instruments Incorporated.  
Copyright 1998, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567

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