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SMTM-S3-T2-FD PDF预览

SMTM-S3-T2-FD

更新时间: 2024-09-10 01:24:43
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CONNOR-WINFIELD /
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描述
Stratum 3 Simplified Control Timing Modules

SMTM-S3-T2-FD 数据手册

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THE CONNOR-WINFIELD CORP.  
Stratum 3 Simplified Control  
Timing Modules (MSTM-S3-T2-FD)  
Fig. 1.0  
DESCRIPTION  
The Connor-Winfield Stratum 3 Miniature Simplified  
Control Timing Module acts as a complete system clock module for  
general Stratum 3 timing applications. The MSTM is designed for  
external control functions. Full external control input allows for  
selections and monitoring of any of four possible operating states: 1)  
Holdover, 2) External Reference #1, 3) External Reference #2, and 4)  
Free Run. The table below illustrates the control signal inputs and  
corresponding operational states:  
In the absence of External Control Inputs (A,B), the MSTM  
enters the Free Run mode and signals an External Alarm. The  
MSTM will enter other operating modes upon application of a proper  
control signal. Mode 1 operation (A=1, B=0) results in an output  
signal that is phase locked to the External Reference Input #1. Mode  
2 operation (A=0, B=1) results in an output signal that is phase  
locked to External Reference Input #2. Holdover mode operation  
(A=1, B=1) results in an output signal at or near the frequency as  
determined by the latest (last) locked-signal input values and the  
holdover performance of the MSTM.  
MSTM-S3-T2-FD  
PIN ASSIGNMENT  
S0  
S1  
+5Vdc  
EX REF 1  
GND  
EX REF 2  
GND  
VALID_R1  
VALID_R2  
GND  
CLK_OUT  
GND  
CNTL A  
CNTL B  
A1  
SYNC_OUT  
GND  
BOTTOM VIEW  
Fig. 2.0  
The primary feature of this model is the Reference  
Frequency Detector (RFD). This is an independent circuit that  
monitors both reference inputs simultaneously to determine that a  
signal is present and its frequency is within a valid range. A logical  
one on the outputs VALID_R1 and VALID_R2 indicates that the  
signals applied to EX_REF1 and EX_REF2 respectively have been  
detected and have a frequency that is within at least +/- 4.6 ppm of  
nominal. A range of +/-4.6 ppm is guaranteed for the life of the  
module. The actual range is somewhat more than twice that to  
account for normal drift and aging that will occur. When, for  
example, the reference applied to EX_REF1 disappears, VALID_R1  
will go to a logical zero within 500 microseconds. When the signal  
returns at a frequency within +/- 4.6 ppm of nominal the VALID_R1  
output will return to a logical one after a 4-second delay. The delay  
is a validation period that requires the output of the frequency  
detector to remain stable for 4 seconds before confirming the status  
of the reference applied. This eliminates the incessant toggling of  
the frequency detector that occurs when the reference frequency is at  
the threshold frequency of the detector  
BLOCK DIAGRAM  
CNTL A  
CNTL B  
0
1
S0  
S1  
TCXO  
R1-CHK  
EX REF 1  
VALID_R1  
EX REF 2  
R2-CHK  
The function of the RFD is not related to the operational alarms,  
LOL and TVL, which monitor the operation of the PLL relative to  
the selected active reference. In fact the operational alarms function  
only at the extreme edge of the PLL operating range. This means that it is quite possible for the active reference to drift out of range of the Reference  
Frequency Detector and still remain well within the capture range of the PLL and not activate the operational alarms. If the other reference was still  
marked valid by the RFD it might make sense to switch to the better reference before the selected reference drifts completely out of range.  
Alarm signals are generated at the Alarm Output during Holdover and Free Run operation. Alarm Signals are also generated by loss-of-lock,  
loss of Reference, and by a Tune-Limit indication from the PLL. A Tune-Limit alarm signal indicates that the OCXO tuning voltage is approaching  
within 10% the limits of its lock capability and that the External Reference Input may be erroneous. A high level indicates an alarm condition. Real-  
time indication of the operational mode is available from outputs S0 and S1, which are determined from internal mode registers.  
Control loop filters effectively attenuate any reference jitter and smooth out phase transients.  
Specifications are subject to change without notice  
DATA SHEET #: tm023  
REV. A02  
FILENAME: MSTMS3T2FD.DOC  
DATE: 10/24/01  
Page 1 of 8  
Copyright 2001 Connor-Winfield all rights reserved  

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