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SM320C40TBBS60 PDF预览

SM320C40TBBS60

更新时间： 2024-11-24 19:46:39
品牌 Logo 应用领域
德州仪器 - TI 时钟外围集成电路
页数 文件大小 规格书
65页 1335K
描述
32-BIT, 60MHz, OTHER DSP, UUC325

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中文翻译

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SM320C40TBBS60 技术参数

生命周期：Obsolete包装说明：DIE, TAB,325PINS,.01
Reach Compliance Code：unknownECCN代码：3A001.A.3
HTS代码：8542.31.00.01风险等级：5.66
Is Samacsys：N地址总线宽度：31
桶式移位器：YES位大小：32
边界扫描：YES最大时钟频率：60 MHz
外部数据总线宽度：32格式：FIXED POINT
内部总线架构：MULTIPLEJESD-30 代码：S-XUUC-N325
低功率模式：NO端子数量：325
最高工作温度：100 °C最低工作温度：-55 °C
封装主体材料：UNSPECIFIED封装代码：DIE
封装等效代码：TAB,325PINS,.01封装形状：SQUARE
封装形式：UNCASED CHIP电源：5 V
认证状态：Not QualifiedRAM（字数）：8192
子类别：Digital Signal Processors最大压摆率：850 mA
最大供电电压：5.25 V最小供电电压：4.75 V
标称供电电压：5 V表面贴装：YES
技术：CMOS温度等级：OTHER
端子形式：NO LEAD端子节距：0.254 mm
端子位置：UPPERuPs/uCs/外围集成电路类型：DIGITAL SIGNAL PROCESSOR, OTHER
Base Number Matches：1

SM320C40TBBS60 数据手册

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SMJ320C40, TMP320C40  
DIGITAL SIGNAL PROCESSORS  
SGUS017H -- OCTOBER 1993 -- REVISED OCTOBER 2001  
D
D
D
D
SMJ: QML Processing to MIL--PRF--38535  
SM: Standard Processing  
TMP: Commercial Level Processing TAB  
Operating Temperature Ranges:  
-- Military (M) --55°C to 125°C  
-- Special (S) --55°C to 100°C  
-- Commercial (C) --25°C to 85°C  
-- Commercial (L) 0°C to 70°C  
D
D
IEEE Standard 1149.1† Test-Access Port  
(JTAG)  
Two Identical External Data and Address  
Buses Supporting Shared Memory Systems  
and High Data-Rate, Single-Cycle  
Transfers:  
-- High Port-Data Rate of 100 MBytes/s  
(Each Bus)  
-- 16G-Byte Continuous  
Program/Data/Peripheral Address Space  
-- Memory-Access Request for Fast,  
Intelligent Bus Arbitration  
D
Highest Performance Floating-Point Digital  
Signal Processor (DSP)  
-- C40-60:  
-- Separate Address-, Data-, and  
Control-Enable Pins  
33-ns Instruction Cycle Time:  
60 MFLOPS, 30 MIPS, 330 MOPS,  
384 MBps  
-- Four Sets of Memory-Control Signals  
Support Different Speed Memories in  
Hardware  
-- C40-50:  
40-ns Instruction Cycle Time:  
50 MFLOPS, 25 MIPS, 275 MOPS,  
320 MBps  
D
Packaging:  
-- 325-Pin Ceramic Grid Array (GF Suffix)  
-- 352-Lead Ceramic Quad Flatpack  
(HFH Suffix)  
-- C40-40:  
50-ns Instruction Cycle Time:  
40 MFLOPS, 20 MIPS, 220 MOPS,  
256 MBps  
-- 324-Pad JEDEC-Standard TAB Frame  
D
D
Fabricated Using Enhanced Performance  
Implanted CMOS (EPIC™) Technology by  
Texas Instruments (TI™)  
Separate Internal Program, Data, and DMA  
Coprocessor Buses for Support of Massive  
Concurrent Input/Output (I/O) of Program  
and Data Throughput, Maximizing  
Sustained Central Processing Unit (CPU)  
Performance  
D
D
Six Communications Ports  
6-Channel Direct Memory Access (DMA)  
Coprocessor  
Single-Cycle Conversion to and From  
IEEE-745 Floating-Point Format  
x
Single Cycle 1/x, 1/  
Source-Code Compatible With SMJ320C30  
Validated Ada Compiler  
Single-Cycle 40-Bit Floating-Point,  
32-Bit Integer Multipliers  
12 40-Bit Registers, 8 Auxiliary Registers,  
14 Control Registers, and 2 Timers  
D
D
D
D
D
D
On-Chip Program Cache and  
Dual-Access/Single-Cycle RAM for  
Increased Memory-Access Performance  
-- 512-Byte Instruction Cache  
-- 8K Bytes of Single-Cycle Dual-Access  
Program or Data RAM  
-- ROM-Based Bootloader Supports  
Program Bootup Using 8-, 16-, or 32-Bit  
Memories Over Any One of the  
Communications Ports  
D
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
†
IEEE Standard 1149.1-1990, IEEE Standard Test-Access Port and Boundary-Scan Architecture.  
EPIC and TI are trademarks of Texas Instruments Incorporated.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
Copyright © 2001, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
1
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251--1443  
1234567...65

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