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SI5980DU-T1-GE3 PDF预览

SI5980DU-T1-GE3

更新时间: 2024-11-18 19:50:11
品牌 Logo 应用领域
威世 - VISHAY 开关晶体管
页数 文件大小 规格书
7页 117K
描述
DUAL N-CHANNEL 100-V (D-S) MOSFET - Tape and Reel

SI5980DU-T1-GE3 技术参数

是否无铅: 不含铅生命周期:Obsolete
包装说明:SMALL OUTLINE, R-XDSO-N6针数:8
Reach Compliance Code:unknownECCN代码:EAR99
风险等级:5.84外壳连接:DRAIN
配置:SEPARATE, 2 ELEMENTS WITH BUILT-IN DIODE最小漏源击穿电压:100 V
最大漏极电流 (Abs) (ID):2.5 A最大漏极电流 (ID):1.3 A
最大漏源导通电阻:0.567 ΩFET 技术:METAL-OXIDE SEMICONDUCTOR
JESD-30 代码:R-XDSO-N6JESD-609代码:e3
湿度敏感等级:1元件数量:2
端子数量:6工作模式:ENHANCEMENT MODE
最高工作温度:150 °C封装主体材料:UNSPECIFIED
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260极性/信道类型:N-CHANNEL
最大功率耗散 (Abs):7.8 W认证状态:Not Qualified
子类别:FET General Purpose Powers表面贴装:YES
端子面层:PURE MATTE TIN端子形式:NO LEAD
端子位置:DUAL处于峰值回流温度下的最长时间:30
晶体管应用:SWITCHING晶体管元件材料:SILICON
Base Number Matches:1

SI5980DU-T1-GE3 数据手册

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Si5980DU  
Vishay Siliconix  
Dual N-Channel 100-V (D-S) MOSFET  
FEATURES  
PRODUCT SUMMARY  
Halogen-free According to IEC 61249-2-21  
VDS (V)  
RDS(on) (Ω)  
ID (A)  
Qg (Typ.)  
Definition  
0.567 at VGS = 10 V  
100  
2.2 nC  
2.5  
TrenchFET® Power MOSFET  
New Thermally Enhanced PowerPAK®  
ChipFET® Package  
- Small Footprint Area  
- Low On-Resistance  
PowerPAK® ChipFET Dual  
- Thin 0.8 mm Profile  
1
Compliant to RoHS Directive 2002/95/EC  
Marking Code  
2
S
1
D
1
D
2
CE  
XXX  
APPLICATIONS  
G
1
3
Lot Traceability  
and Date Code  
D
1
Load Supply  
4
S
2
8
D
1
Part # Code  
Power Supply  
G
2
7
D
2
G
1
G
2
6
D
2
5
S
S
2
1
Bottom View  
Ordering Information: Si5980DU-T1-GE3 (Lead (Pb)-free and Halogen-free)  
N-Channel MOSFET  
N-Channel MOSFET  
ABSOLUTE MAXIMUM RATINGS T = 25 °C, unless otherwise noted  
A
Parameter  
Drain-Source Voltage  
Gate-Source Voltage  
Symbol  
VDS  
VGS  
Limit  
100  
20  
Unit  
V
TC = 25 °C  
2.5  
TC = 70 °C  
TA = 25 °C  
TA = 70 °C  
2.0  
1.3b, c  
Continuous Drain Current (TJ = 150 °C)  
ID  
1.0b, c  
3
6a  
1.7b, c  
2
A
IDM  
IS  
Pulsed Drain Current  
TC = 25 °C  
TA = 25 °C  
Continuous Source-Drain Diode Current  
IAS  
EAS  
Single Pulse Avalanche Current  
Avalanche Energy  
L = 0.1 mH  
mJ  
W
0.2  
7.8  
5.0  
2.0b, c  
1.3b, c  
TC = 25 °C  
TC = 70 °C  
TA = 25 °C  
TA = 70 °C  
PD  
Maximum Power Dissipation  
TJ, Tstg  
Operating Junction and Storage Temperature Range  
Soldering Recommendations (Peak Temperature)d, e  
- 55 to 150  
°C  
260  
THERMAL RESISTANCE RATINGS  
Parameter  
Symbol  
RthJA  
RthJC  
Typical  
49  
Maximum  
Unit  
Maximum Junction-to-Ambientb, f  
t 5 s  
Steady State  
61  
16  
°C/W  
Maximum Junction-to-Case (Drain)  
13  
Notes:  
a. Package limited.  
b. Surface Mounted on 1" x 1" FR4 board.  
c. t = 5 s.  
d. See Solder Profile (www.vishay.com/ppg?73257). The PowerPAK ChipFET is a leadless package. The end of the lead terminal is exposed  
copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and  
is not required to ensure adequate bottom side solder interconnection.  
e. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.  
f. Maximum under Steady State conditions is 110 °C/W.  
Document Number: 65576  
S10-0033-Rev. A, 11-Jan-10  
www.vishay.com  
1

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