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SI1039X-T1 PDF预览

SI1039X-T1

更新时间: 2024-11-17 22:11:07
品牌 Logo 应用领域
威世 - VISHAY 晶体晶体管
页数 文件大小 规格书
3页 256K
描述
P-Channel 1.8-V (G-S) MOSFET

SI1039X-T1 技术参数

是否Rohs认证:不符合生命周期:Obsolete
包装说明:,Reach Compliance Code:unknown
风险等级:5.86Is Samacsys:N
配置:Single最大漏极电流 (Abs) (ID):0.87 A
FET 技术:METAL-OXIDE SEMICONDUCTORJESD-609代码:e0
工作模式:ENHANCEMENT MODE最高工作温度:150 °C
极性/信道类型:P-CHANNEL最大功率耗散 (Abs):0.21 W
子类别:Other Transistors表面贴装:YES
端子面层:Tin/Lead (Sn/Pb)Base Number Matches:1

SI1039X-T1 数据手册

 浏览型号SI1039X-T1的Datasheet PDF文件第2页浏览型号SI1039X-T1的Datasheet PDF文件第3页 
SPICE Device Model Si1039X  
Vishay Siliconix  
P-Channel 2.5-V (G-S) MOSFET  
CHARACTERISTICS  
P-Channel Vertical DMOS  
Macro Model (Subcircuit Model)  
Level 3 MOS  
Apply for both Linear and Switching Application  
Accurate over the 55 to 125°C Temperature Range  
Model the Gate Charge, Transient, and Diode Reverse Recovery  
Characteristics  
DESCRIPTION  
The attached spice model describes the typical electrical  
characteristics of the p-channel vertical DMOS. The subcircuit  
model is extracted and optimized over the 55 to 125°C  
temperature ranges under the pulsed 0-V to 5-V gate drive. The  
saturated output impedance is best fit at the gate bias near the  
threshold voltage.  
A novel gate-to-drain feedback capacitance network is used to model  
the gate charge characteristics while avoiding convergence difficulties  
of the switched Cgd model. All model parameter values are optimized  
to provide a best fit to the measured electrical data and are not  
intended as an exact physical interpretation of the device.  
SUBCIRCUIT MODEL SCHEMATIC  
This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate  
data sheet of the same number for guaranteed specification limits.  
www.vishay.com  
Document Number: 71771  
S-50151Rev. B, 07-Feb-05  
1

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