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SG3525A

更新时间: 2024-11-10 22:43:15
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
8页 209K
描述
PULSE WIDTH MODULATOR CONTROL CIRCUITS

SG3525A 数据手册

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Order this document by SG3525A/D  
PULSE WIDTH MODULATOR  
CONTROL CIRCUITS  
The SG3525A, SG3527A pulse width modulator control circuits offer  
improved performance and lower external parts count when implemented for  
controlling all types of switching power supplies. The on–chip +5.1 V  
reference is trimmed to ±1% and the error amplifier has an input  
common–mode voltage range that includes the reference voltage, thus  
eliminating the need for external divider resistors. A sync input to the  
oscillator enables multiple units to be slaved or a single unit to be  
synchronized to an external system clock. A wide range of deadtime can be  
SEMICONDUCTOR  
TECHNICAL DATA  
programmed by a single resistor connected between the C and Discharge  
T
pins. These devices also feature built–in soft–start circuitry, requiring only an  
external timing capacitor. A shutdown pin controls both the soft–start circuitry  
and the output stages, providing instantaneous turn off through the PWM  
latch with pulsed shutdown, as well as soft–start recycle with longer  
shutdown commands. The under voltage lockout inhibits the outputs and the  
N SUFFIX  
PLASTIC PACKAGE  
16  
CASE 648  
1
changing of the soft–start capacitor when V  
is below nominal. The output  
CC  
stages are totem–pole design capable of sinking and sourcing in excess of  
200 mA. The output stage of the SG3525A features NOR logic resulting in a  
low output for an off–state while the SG3527A utilized OR logic which gives a  
high output when off.  
DW SUFFIX  
8.0 V to 35 V Operation  
PLASTIC PACKAGE  
CASE 751B  
(SO–16L)  
16  
5.1 V ± 1.0% Trimmed Reference  
100 Hz to 400 kHz Oscillator Range  
Separate Oscillator Sync Pin  
1
Adjustable Deadtime Control  
Input Undervoltage Lockout  
PIN CONNECTIONS  
Latching PWM to Prevent Multiple Pulses  
Pulse–by–Pulse Shutdown  
Dual Source/Sink Outputs: ±400 mA Peak  
Inv. Input  
Noninv. Input  
Sync  
V
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
ref  
V
CC  
Output B  
OSC. Output  
V
C
Representative Block Diagram  
C
T
Ground  
16  
15  
12  
VC  
13  
V
To Internal  
Circuitry  
ref  
R
T
Output A  
Reference  
Regulator  
Under–  
Voltage  
Lockout  
V
CC  
Output A  
11  
Discharge  
Soft–Start  
Shutdown  
Compensation  
Ground  
NOR  
NOR  
4
OSC Output  
3
6
Q
Sync  
RT  
F/F  
(Top View)  
Oscillator  
Q
14  
5
Output B  
CT  
7
Discharge  
R
Latch  
S
SG3525A Output Stage  
+
9
1
S
13  
– PWM  
Compensation  
INV. Input  
VC  
ORDERING INFORMATION  
Error  
Amp  
Output A  
11  
50µA  
2
8
Noninv. Input  
+
V
REF  
OR  
Operating  
Temperature Range  
C
Device  
Package  
Soft–Start  
Output B  
14  
10  
5.0k  
5.0k  
SG3525AN  
SG3525ADW  
SG3527AN  
Plastic DIP  
SO–16L  
Shutdown  
OR  
T
= 0° to +70°C  
A
SG3527A  
Output Stage  
Plastic DIP  
Motorola, Inc. 1996  
Rev 2  

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