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SG3525AN PDF预览

SG3525AN

更新时间: 2024-01-02 09:49:59
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 开关脉冲光电二极管
页数 文件大小 规格书
12页 120K
描述
REGULATING PULSE WIDTH MODULATORS

SG3525AN 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:DIP
包装说明:LEAD FREE, PLASTIC, DIP-16针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:0.45Samacsys Confidence:4
Samacsys Status:ReleasedSamacsys PartID:2376010
Samacsys Pin Count:16Samacsys Part Category:Integrated Circuit
Samacsys Package Category:Dual-In-Line PackagesSamacsys Footprint Name:PDIP-16
Samacsys Released Date:2019-08-07 13:53:52Is Samacsys:N
模拟集成电路 - 其他类型:SWITCHING CONTROLLER控制模式:VOLTAGE-MODE
控制技术:PULSE WIDTH MODULATION最大输入电压:35 V
最小输入电压:8 V标称输入电压:20 V
JESD-30 代码:R-PDIP-T16JESD-609代码:e3
长度:19.175 mm功能数量:1
端子数量:16最高工作温度:70 °C
最低工作温度:最大输出电流:0.5 A
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:4.44 mm
子类别:Switching Regulator or Controllers表面贴装:NO
切换器配置:PUSH-PULL最大切换频率:400 kHz
技术:BIPOLAR温度等级:COMMERCIAL
端子面层:Matte Tin (Sn) - annealed端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:7.62 mm
Base Number Matches:1

SG3525AN 数据手册

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SG2525A  
SG3525A  
REGULATING PULSE WIDTH MODULATORS  
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8 TO 35 V OPERATION  
5.1 V REFERENCE TRIMMED TO 1%  
±
100 Hz TO 500 KHz OSCILLATORRANGE  
SEPARATE OSCILLATORSYNC TERMINAL  
ADJUSTABLE DEADTIME CONTROL  
INTERNALSOFT-START  
PULSE-BY-PULSESHUTDOWN  
INPUT UNDERVOLTAGE LOCKOUT WITH  
HYSTERESIS  
LATCHING PWM TO PREVENT MULTIPLE  
PULSES  
DUAL SOURCE/SINK OUTPUT DRIVERS  
DIP16  
16(Narrow)  
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DESCRIPTION  
The SG3525Aseries of pulse width modulatorinte-  
grated circuits are designed to offer improved per-  
formance and lowered external parts count when  
used in designing all types of switchingpower sup-  
plies. Theon-chip + 5.1 V referenceis trimmed to ±  
1 % andthe inputcommon-mode rangeof the error  
amplifier includes the reference voltageeliminating  
external resistors. A sync input to the oscillator al-  
lows multipleunitsto beslavedor a singleunittobe  
synchronizedto an externalsystem clock. A single  
resistorbetweentheCT andthedischargeterminals  
provide a wide range of dead time ad- justment.  
Thesedevicesalsofeaturebuilt-insoft-startcircuitry  
with only an external timing capacitor required. A  
shutdownterminal controlsboththe soft-startcircu-  
ity and the output stages, providing instantaneous  
turn off through the PWM latch with pulsed shut-  
down,as well as soft-start recycle with longer shut-  
downcommands.Thesefunctionsarealsocontrol-  
ledbyan undervoltagelockoutwhichkeepsthe out-  
puts off and the soft-start capacitor discharged for  
sub-normal input voltages.This lockoutcircuitry in-  
cludesapproximately500mVofhysteresisforjitter-  
free operation. Another feature of these PWM cir-  
cuits is a latch following the comparator. Once a  
PWM pulses has been terminated for any reason,  
theoutputswill remainoff for the durationof the pe-  
riod. The latch is reset with each clock pulse. The  
output stages are totem-pole designs capable of  
sourcing or sinking in excess of 200 mA. The  
SG3525AoutputstagefeaturesNOR logic,givinga  
LOW outputfor an OFF state.  
PIN CONNECTIONS AND ORDERING NUMBERS (top view)  
Type  
Plastic DIP  
SG2525AN  
SG3525AN  
SO16  
SG2525A  
SG3525A  
SG2525AP  
SG3525AP  
June 2000  
1/12  

SG3525AN 替代型号

型号 品牌 替代类型 描述 数据表
SG2525AN STMICROELECTRONICS

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