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SG3525AP PDF预览

SG3525AP

更新时间: 2024-11-12 17:15:31
品牌 Logo 应用领域
友台半导体 - UMW /
页数 文件大小 规格书
5页 758K
描述
DC-DC芯片

SG3525AP 数据手册

 浏览型号SG3525AP的Datasheet PDF文件第2页浏览型号SG3525AP的Datasheet PDF文件第3页浏览型号SG3525AP的Datasheet PDF文件第4页浏览型号SG3525AP的Datasheet PDF文件第5页 
R
SG3525  
U
MW  
n
descriptio  
Package  
The accuracy of the chip +5.1V reference  
voltage is 1%. Because the reference voltage is within  
the input common- mode range of the error  
amplifier, there is no need for an external resistor.  
3525 can work in maste-rslave mode and can also  
be synchronized with external clock. The dead time  
can be adjusted by the resistance between CT and  
discharge terminal. Other functional circuits inside  
the chip also include: soft start circuit, turn- off circuit  
and under- voltage circuit.  
DIP16  
SOP16  
3525  
The output stage of the control chip is  
a high-power totem- pole output, and its source  
current and sink current exceed 150mA, which gives  
a logic level of "NOR" and a low level when it is in  
the "off" state. trait  
The working voltage range is 8~35V;  
5.1V reference voltage with accuracy of 1%;  
The oscillation frequency range is 100Hz~500KHz;  
The oscillator synchronization signal input end;  
Dead time is adjustable;  
Built- in soft start circuit;  
Step- by- step pulse shutdown;  
Input undervoltage locking with hysteresis voltage;  
PWM locking function, prohibiting multi-pulse;  
Internal block diagram  
www.umw-ic.com  
UTD Semiconductor Co.,Limited  
1

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