Datasheet > SCG3040G5-077.76M

SCG3040G5-077.76M

更新时间： 2024-01-04 16:30:01

品牌	Logo	应用领域
CONNOR-WINFIELD		ATM 异步传输模式电信电信集成电路
页数	文件大小	规格书
12页	269K
描述
Support Circuit, 1-Func, 0.750 X 1.250 INCH, 0.450 INCH HEIGHT, PACKAGE-20

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技术参数
数据手册

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SCG3040G5-077.76M 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Active	零件包装代码：	DMA
包装说明：	,	针数：	20
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.9	JESD-30 代码：	R-XDMA-N20
功能数量：	1	端子数量：	20
最高工作温度：	70 °C	最低工作温度：
封装主体材料：	UNSPECIFIED	封装形状：	RECTANGULAR
封装形式：	MICROELECTRONIC ASSEMBLY	峰值回流温度（摄氏度）：	217
认证状态：	Not Qualified	标称供电电压：	3.3 V
表面贴装：	NO	电信集成电路类型：	ATM/SONET/SDH SUPPORT CIRCUIT
温度等级：	COMMERCIAL	端子形式：	NO LEAD
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
Base Number Matches：	1

SCG3040G5-077.76M 数据手册

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SCG3040G5

Synchronous Clock

Generator

PLL

2111 Comprehensive Drive

Aurora, Illinois 60505

Phone: 630-851-4722

Fax: 630- 851-5040

www.conwin.com

Features

Application

• 3.3V High Precision

PLL

The SCG3040G5 is designed for use as a

reference input for OC-48 Framers and

SERDES. It generates less than 1 psRMS

jitter over the OC-48 bandwidth.

SCG3040G5 is well suited for use in line

cards, service termination cards and similar

functions to provide reliable reference,

phase locked, synchronization for TDM,

PDH, SONET, and SDH network

equipment. The SCG3040G5 provides a

jitter filtered, wander following output signal

synchronized to a superior Stratum or peer

input reference signal.

• Two Differential

LVPECL Outputs.

155.52 MHz or 77.76

MHz

• 19.44 MHz CMOS

Input Reference

• Reference Duty Cycle

Tolerant

• Low Temperature

Reflow Surface

Mounting

This product is ROHS-5 compliant.

ROHS-5 indicates that this product is

ROHS compliant except for lead from those

manufacturers wishing to take the lead

exemption.

• ROHS-5 compliant

Bulletin

SG127

Page

1 of 12

Revision

Date

25 APR 06

Issued By

ENG

12 3 4 5 6 7...12

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