Datasheet > SCG305-155.52M

SCG305-155.52M

更新时间： 2024-11-21 20:11:35

品牌	Logo	应用领域
CONNOR-WINFIELD		光电二极管
页数	文件大小	规格书
6页	61K
描述
Clock Generator, Hybrid, PDSO20

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数据手册

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SCG305-155.52M 数据手册

THE CONNOR-WINFIELD CORP.

2111 COMPREHENSIVE DRIVE.

AURORA, IL 60505.

FAX (630) 581-5040.

SCG305 SYNCHRONOUS CLOCK

GENERATOR

PHONE (630) 851-4722.

FEATURES:

•

Phase Locked Output Frequency Control.

Intrinsically Low Jitter Crystal Oscillator.

Two Pairs of Differential LVPECL

Outputs.

•

CMOS 8 KHz Reference Input.

Fast 1 Second Acquisition Time.

Input Duty Cycle Tolerant.

3.3 Volt Power Supply.

Small Size: 0.75” x 1.20” Surface Mount

Package.

Figure 1: Package Outline

GENERAL DESCRIPTION:

The SCG305 is a digital phase locked loop generating 155.52 MHz LVPECL

outputs from an intrinsically low jitter voltage controlled crystal oscillator. The SCG305

is phase locked to an external 8 KHz reference input.

The unit has a fast acquisition time of about 1 seconds and it is tolerant of

different reference duty cycles. The SCG305 is ideal for applications using

multiplication to obtain higher SONET frequencies.

The package dimensions are 0.75” x 1.20” x .40” on a 4 layer FR4 board with

castellated pins. Parts are assembled using high temperature solder to withstand surface

mount reflow processes.

BLOCK DIAGRAM:

P h a s e

D e te c to r

L o w J itte r

V C X O

8 k H z

F ilte r

Q 1

Q N 1

Q 2

L V P E C L

D riv e r

D iv id e r

Q N 2

ORDERING INFORMATION:

SCG305-155.52M

Specifications are subject to change without notice

DATA SHEET #: SG015 REVISION #: 01

FILENAME: SCG305.DOC

DATE: 12/04/2000

PAGE: - 1 - 6

12 3 4 5 6

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