Datasheet > SC68C752B

SC68C752B

更新时间： 2024-09-18 21:55:43

品牌	Logo	应用领域
恩智浦 - NXP		先进先出芯片
页数	文件大小	规格书
46页	210K
描述
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs and Motorola mP interface

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SC68C752B 数据手册

SC68C752B

5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte

FIFOs and Motorola µP interface

Rev. 02 — 28 April 2005

Product data sheet

1. General description

The SC68C752B is a dual Universal Asynchronous Receiver/Transmitter (UART) with

64-byte FIFOs, automatic hardware/software ﬂow control, and data rates up to 5 Mbit/s.

The SC68C752B offers enhanced features. It has a Transmission Control Register (TCR)

that stores receiver FIFO threshold levels to start/stop transmission during hardware and

software ﬂow control. With the FIFO Rdy register, the software gets the status of

TXRDY/RXRDY for all four ports in one access. On-chip status registers provide the user

with error indications, operational status, and modem interface control. System interrupts

may be tailored to meet user requirements. An internal loop-back capability allows

on-board diagnostics.

The UART transmits data, sent to it over the peripheral 8-bit bus, on the TX signal and

receives characters on the RX signal. Characters can be programmed to be 5, 6, 7, or

8 bits. The UART has a 64-byte receive FIFO and transmit FIFO and can be programmed

to interrupt at different trigger levels. The UART generates its own desired baud rate

based upon a programmable divisor and its input clock. It can transmit even, odd, or no

parity and 1, 1.5, or 2 stop bits. The receiver can detect break, idle, or framing errors,

FIFO overﬂow, and parity errors. The transmitter can detect FIFO underﬂow. The UART

also contains a software interface for modem control operations, and has software ﬂow

control and hardware ﬂow control capabilities.

The SC68C752B is available in a plastic LQFP48 package.

2. Features

■ Dual channel with Motorola µP interface

■ Up to 5 Mbit/s data rate

■ 64-byte transmit FIFO

■ 64-byte receive FIFO with error ﬂags

■ Programmable and selectable transmit and receive FIFO trigger levels for DMA and

interrupt generation

■ Software/hardware ﬂow control

◆ Programmable Xon/Xoff characters

◆ Programmable Auto-RTS and Auto-CTS

■ Optional data ﬂow resume by Xon any character

■ DMA signalling capability for both received and transmitted data

■ Supports 5 V, 3.3 V and 2.5 V operation

■ 5 V tolerant inputs

■ Software selectable baud rate generator

12 3 4 5 6 7...46

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与SC68C752B相关器件

型号	品牌	获取价格	描述	数据表
SC68C752BIB48	NXP	获取价格	5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max
SC68C752BIB48,128	NXP	获取价格	SC68C752B - 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs and 68 mod
SC68C752BIB48,157	NXP	获取价格	SC68C752B - 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs and 68 mod
SC68C752BIBS	NXP	获取价格	5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max
SC68C752BIBS,128	NXP	获取价格	SC68C752B - 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs and 68 mod
SC68C752BIBS,157	NXP	获取价格	SC68C752B - 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs and 68 mod
SC68C92C1A44	NXP	获取价格	IC 2 CHANNEL(S), 1M bps, SERIAL COMM CONTROLLER, PQCC44, PLASTIC, LCC-44, Serial IO/Commun
SC68C92C1A44-T	YAGEO	获取价格	Serial I/O Controller, 2 Channel(s), 0.125MBps, CMOS, PQCC44
SC68C92C1N40	NXP	获取价格	IC 2 CHANNEL(S), 1M bps, SERIAL COMM CONTROLLER, PDIP40, Serial IO/Communication Controlle
SC68C92E1A44	NXP	获取价格	IC 2 CHANNEL(S), 1M bps, SERIAL COMM CONTROLLER, PQCC44, PLASTIC, LCC-44, Serial IO/Commun

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