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SC660E

更新时间: 2024-09-19 09:33:19
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟
页数 文件大小 规格书
8页 52K
描述
SMBus System Clock Buffer for Mobile Applications

SC660E 数据手册

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SC660E  
SMBus System Clock Buffer for Mobile Applications  
Product Features  
Product Description  
§
§
10 output buffers for high clock fanout applications  
The device is a high fanout system clock distributor. Its  
primary application is to create the large quantity of  
clocks needed to support a wide range of clock loads  
that are referenced to a single existing clock. Loads of  
up to 30 pF are supported. Primary application of this  
component is where long traces are used to transport  
clocks from their generating devices to their loads. The  
creation of EMI and the degradation of waveform rise  
and fall times is greatly reduced by running a single  
reference clock trace to this device and then using it to  
regenerate the clock that drives shorter traces by using  
the SC660 to generate the clocks at the target devices  
EMI is therefore minimized and board real estate is  
saved.  
Each output can be internally disabled for EMI and  
power consumption reduction.  
§
Separate power supply for each group of 2 clock  
outputs for mixed voltage application.  
§
§
§
< 250ps skew between output clocks.  
28-pin SSOP package for minimum board space  
Single output Tristate pin for testability  
Pin Configuration  
Block Diagram  
VDDB  
SDRAM(0:1)  
28  
1
VDDB  
SDRAM0  
SDRAM1  
VSS  
VDDB  
SDRAM9  
SDRAM8  
VSS  
VDDB  
SDRAM7  
SDRAM6  
VSS  
2
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
3
SDRAM(2:3)  
SDRAM4  
4
5
VDDB  
6
SDRAM2  
SDRAM3  
VSS  
7
FIN  
8
9
FIN  
OE  
SDRAM5  
10  
11  
12  
13  
14  
VDDB  
SDRAM4  
VSS  
VDDB  
SDRAM5  
VSS  
VDD  
SDRAM(6:7)  
SDRAM(8:9)  
VDD  
VSS  
SDATA  
SCLOCK  
SDATA  
SCLOCK  
OE  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose, CA 95134. Tel: 408-043-2600  
http://www.cypress.com  
Document#: 38-07025 Rev. *A  
12/17/2002  
Page 1 of 8  

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