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S1D13706F00A200 PDF预览

S1D13706F00A200

更新时间: 2024-09-19 15:50:11
品牌 Logo 应用领域
精工 - SEIKO 时钟外围集成电路
页数 文件大小 规格书
2页 97K
描述
320X240 PIXELS CRT OR FLAT PNL GRPH DSPL CTLR, PQFP100, TQFP-100

S1D13706F00A200 数据手册

 浏览型号S1D13706F00A200的Datasheet PDF文件第2页 
GRAPHICS  
S1D13706  
March 2009  
S1D13706 Embedded Memory LCD Controller  
The S1D13706 is a color/monochrome LCD graphics controller with an embedded 80K byte SRAM  
display buffer. While supporting all other panel types, the S1D13706 is the only LCD controller to directly  
interface to both the Epson D-TFD and the Sharp HR-TFT family of products thus removing the  
requirement of an external Timing Control IC. This high level of integration provides a low cost, low  
power, single chip solution to meet the demands of embedded markets such as Mobile Communications  
devices and Palm-size PCs, where board size and battery life are major concerns.  
The S1D13706 utilizes a guaranteed low-latency CPU architecture thus providing support for micropro-  
cessors without READY/WAIT# handshaking signals. The 32-bit internal data path provides high perfor-  
mance bandwidth into display memory allowing for fast screen updates.  
TM  
Products requiring a rotated display image can take advantage of the SwivelView feature which  
provides hardware rotation of the display memory transparent to the software application. The  
S1D13706 also provides support for “Picture-in-Picture Plus” (a variable size Overlay window).  
®
The S1D13706 provides impressive support for Palm OS handhelds, however its impartiality to CPU  
type or operating system makes it an ideal display solution for a wide variety of applications.  
FEATURES  
TM  
Embedded Display Buffer.  
SwivelView (90, 180, 270° hardware  
rotation of displayed image).  
Low Operating Voltage.  
“Picture-in-Picture Plus”.  
Low-latency CPU interface.  
Direct support for the multiple CPU types.  
Programmable Resolutions and Color depths.  
STN LCD support.  
Software Initiated Power Save Mode.  
Hardware or Software Video Invert.  
100-pin TQFP15 package.  
104-pin CFLGA package.  
Active Matrix LCD support.  
Reflective Active Matrix support.  
SYSTEM BLOCK DIAGRAM  
Digital Out  
Data and  
Control Signals  
CPU  
S1D13706  
Flat Panel  
X31B-C-001-03  
1
Revision 3.2  

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