Datasheet > PUMD24

PUMD24

更新时间： 2023-09-03 20:33:31

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
12页	257K
描述
50 V, 20 mA NPN/PNP resistor-equipped double transistor; R1 = 100 kΩ, R2 = 100 kΩProduction

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中文翻译

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技术参数
数据手册

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PUMD24 技术参数

生命周期：	Obsolete	零件包装代码：	TSSOP
包装说明：	SMALL OUTLINE, R-PDSO-G6	针数：	6
Reach Compliance Code：	compliant	风险等级：	5.79
其他特性：	BUILT IN BIAS RESISTOR RATIO 1	最大集电极电流 (IC)：	0.02 A
集电极-发射极最大电压：	50 V	配置：	SEPARATE, 2 ELEMENTS WITH BUILT-IN RESISTOR
最小直流电流增益 (hFE)：	80	JESD-30 代码：	R-PDSO-G6
元件数量：	2	端子数量：	6
最高工作温度：	150 °C	封装主体材料：	PLASTIC/EPOXY
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
极性/信道类型：	NPN AND PNP	表面贴装：	YES
端子形式：	GULL WING	端子位置：	DUAL
晶体管应用：	SWITCHING	晶体管元件材料：	SILICON
Base Number Matches：	1

PUMD24 数据手册

PUMD24

50 V, 20 mA NPN/PNP resistor-equipped double transistor;

R1 = 100 kΩ, R2 = 100 kΩ

31 March 2023

Product data sheet

1. General description

NPN/PNP double Resistor-Equipped Transistor (RET) in a very small SOT363 (SC-88) Surface-

Mounted Device (SMD) plastic package.

PNP/PNP complement: PUMB24

NPN/NPN complement: PUMH24

2. Features and benefits

•

Built-in bias resistors

•

Simplifies circuit design

Reduces component count

Reduces pick and place costs

AEC-Q101 qualified

3. Applications

•

Low current peripheral driver

Control of IC inputs

Replacement of general-purpose transistors in digital applications

4. Quick reference data

Table 1. Quick reference data

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Per transistor

V_CEO

collector-emitter

voltage

open base

[1]

I_O

output current

[1]

[2]

kΩ

bias resistor 1 (input)

bias resistor ratio

0.8

100

130

1.2

R2/R1

T_amb= 25 °C

[1] For the PNP transistor with negative polarity.

[2] See section "Test information" for resistor calculation and test conditions.

12 3 4 5 6 7...12

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