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PTH03060Y

更新时间： 2024-09-09 04:34:15
品牌 Logo 应用领域
德州仪器 - TI 存储
页数 文件大小 规格书
19页 838K
描述
MEMORY BUS TERMINATION MODULES

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PTH03060Y  
PTH05060Y, PTH12060Y  
www.ti.com  
SLTS222A–MARCH 2004–REVISED OCTOBER 2005  
10-A NON-ISOLATED DDR/QDR  
MEMORY BUS TERMINATION MODULES  
FEATURES  
•
VTT Bus Termination Output  
•
•
57 W/in3 Power Density  
Safety Agency Approvals:  
UL/cUL60950, EN60950, VDE  
(Output Tracks the System VREF  
)
•
•
•
•
•
•
•
•
10 A Output Current  
3.3-V, 5-V or 12-V Input Voltage  
DDR and QDR Compatible  
On/Off Inhibit (for VTT Standby)  
Undervoltage Lockout  
•
Point-of-Load Alliance (POLA™) Compatible  
NOMINAL SIZE  
1 in. x 0.62 in  
(25,4 mm x 15,75 mm)  
Operating Temperature: –40°C to 85°C  
Efficiencies up to 91%  
Output Overcurrent Protection (Non-Latching,  
Auto-Reset)  
DESCRIPTION  
The PTHxx060Y are a series of ready-to-use switching regulator modules from Texas Instruments designed  
specifically for bus termination in DDR and QDR memory applications. Operating from either a 3.3-V, 5-V or 12-V  
input, the modules generate a VTT output that will source or sink up to 10 A of current to accurately track their  
VREF input. VTT is the required bus termination supply voltage, and VREF is the reference voltage for the memory  
and chipset bus receiver comparators. VREF is usually set to half the VDDQ power supply voltage.  
Both the PTHxx060Y series employs an actively switched synchronous rectifier output to provide state-of-the-art  
stepdown switching conversion. The products are small in size (1 in × 0.62 in), and are an ideal choice where  
space, performance, and high efficiency are desired, along with the convenience of a ready-to-use module.  
Operating features include an on/off inhibit and output over-current protection (source mode only). The on/off  
inhibit feature allows the VTT bus to be turned off to save power in a standby mode of operation. To ensure tight  
load regulation, an output remote sense is also provided. Package options include both throughhole and surface  
mount configurations.  
STANDARD APPLICATION  
V
IN  
VREF  
VDDQ  
1 k  
1 %  
10  
9
8
VTT  
1
2
7
6
PTHxx060Y  
(Top View)  
1 k  
1 %  
Con  
hf−Ceramic  
3
4
5
C
IN  
(Required)  
SSTL−2  
Co1  
Co2  
Low−ESR  
(Required)  
Ceramic  
(Optional)  
Q
1
Bus  
BSS138  
Standby  
GND  
(Optional)  
C
= Required Capacitor; 330µF (3.3 ± 5 V Input), 560 µF (12 V Input).  
IN  
Co = Required Low-ESR Electrolyitic Capacitor; 470 µF (3.3 ± 5 V Input), 940 µF (12 V Input).  
1
Co = Ceramic Capacitance for Optimum Response to a 3 A (+ 1.5 A) Load Transient; 200 µF (3.3 ± 5 V Input), 400 µF (12 V Input).  
2
Co = Distributed hf-Ceramic Decoupling Capacitors for V bus; as Recommended for DDR Memory Applications.  
n TT  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
POLA is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2004–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
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