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PM39LV512-70WC PDF预览

PM39LV512-70WC

更新时间： 2024-09-10 15:48:07
品牌 Logo 应用领域
美国芯成 - ISSI 内存集成电路
页数 文件大小 规格书
20页 435K
描述
Flash, 64KX8, 70ns, DIE

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PM39LV512-70WC 技术参数

生命周期：End Of Life包装说明：DIE,
Reach Compliance Code：unknown风险等级：5.8
Is Samacsys：N最长访问时间：70 ns
JESD-30 代码：X-XUUC-N内存密度：524288 bit
内存集成电路类型：FLASH内存宽度：8
功能数量：1字数：65536 words
字数代码：64000工作模式：ASYNCHRONOUS
最高工作温度：85 °C最低工作温度：-40 °C
组织：64KX8封装主体材料：UNSPECIFIED
封装代码：DIE封装形状：UNSPECIFIED
封装形式：UNCASED CHIP并行/串行：PARALLEL
编程电压：3 V最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：2.7 V标称供电电压 (Vsup)：3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：NO LEAD
端子位置：UPPER类型：NOR TYPE
Base Number Matches：1

PM39LV512-70WC 数据手册

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Pm39LV512 / Pm39LV010  
512 Kbit / 1Mbit 3.0 Volt-only CMOS Flash Memory  
FEATURES  
• Single Power Supply Operation  
• Low Power Consumption  
- Low voltage range: 2.7 V - 3.6 V  
- Typical 4 mA active read current  
- Typical 8 mA program/erase current  
- Typical 0.1 µA CMOS standby current  
- For Pm39LV512 only temp. +85 C~+125 C,  
support 20uA (max).  
• Memory Organization  
- Pm39LV512: 64K x 8 (512 Kbit)  
- Pm39LV010: 128K x 8 (1 Mbit)  
o
o
• Data# Polling and Toggle Bit Features  
o
o
• High Performance Read  
- 70 ns access time  
• Program/Erase support in 0 C~+125 C.  
• Hardware Data Protection  
• High Product Endurance  
- For Pm39LV512  
o
0
temp. -40 C~+85 C : 70ns  
- Guarantee 100,000 program/erase cycles per  
single sector  
o
o
temp. +85 C~+125 C : 90ns  
- Minimum 20 years data retention  
- For Pm39LV512 temp. +85 C~+125 C,  
support 10,000 program/erase cycles.  
• Cost Effective Sector Architecture  
- Uniform 4 Kbyte sectors  
o
o
• Automatic Erase and Byte Program  
- Build-in automatic program verification  
- Max 40 µs/byte programming time  
- Typical 55 ms sector/chip erase time  
• Industrial Standard Pin-out and Packaging  
- 32-pin VSOP (TSOP 8 mm x 14 mm)  
- 32-pin PLCC  
-Optional Halogen-Free package  
GENERAL DESCRIPTION  
The Pm39LV512/010 are 512 Kbit/1 Mbit 3.0 Volt-only Flash Memories. These devices are designed to use a single  
low voltage, range from 2.7 Volt to 3.6 Volt, power supply to perform read, erase and program operations. The 12.  
0 Volt VPP power supply for program and erase operations are not required. The devices can be programmed in  
standard EPROM programmers as well.  
The memory arrays of Pm39LV512/010 are divided into uniform 4 Kbyte sectors for data or code storage. The  
sector erase feature allows users to flexibly erase a sector without affecting the data in others. The chip erase  
feature allows the whole memory array to be erased in one single erase operation. The devices can be programmed  
on a byte-by-byte basis after performing the erase operation.  
The devices have a standard microprocessor interface as well as a JEDEC standard pin-out/command set. The  
program operation is executed by issuing the program command code into command register. The internal control  
logic automatically handles the programming voltage ramp-up and timing. The erase operation is executed by  
issuing the chip erase, or sector erase command code into command register. The internal control logic automatically  
handles the erase voltage ramp-up and timing. The preprogramming on the array which has not been programmed  
is not required before an erase operation. The devices offer Data# Polling and Toggle Bit functions, the progress or  
completion of program and erase operations can be detected by reading the Data# Polling on I/O7 or the Toggle Bit  
on I/O6.  
The Pm39LV512/010 are manufactured on pFLASH™’s advanced nonvolatile CMOS technology.  
The devices are offered in 32-pin VSOP (TSOP 8 mm x 14 mm) and PLCC packages with access time of 70 ns.  
Chingis Technology Corporation  
Issue Date: April, 2009 Rev:1.8  
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