Datasheet > PLL1707-Q1

PLL1707-Q1

更新时间： 2024-11-10 12:21:43

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
18页	602K
描述
3.3-V DUAL-PLL MULTICLOCK GENERATOR

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

PLL1707-Q1 数据手册

PLL1707-Q1

www.ti.com

SLES259A –JUNE 2010–REVISED MARCH 2011

3.3-V DUAL-PLL MULTICLOCK GENERATOR

Check for Samples: PLL1707-Q1

FEATURES

•

Qualified for Automotive Applications

•

3.3-V Single Power Supply

27-MHz Master Clock Input

Parallel Control

Generated Audio System Clock

Package: 20-Pin SSOP (150 mil), Lead-Free

Product

–

SCKO0: 768 f_S(f_S= 44.1 kHz)

SCKO1: 768 f_S, 512 f_S(f_S= 48 kHz)

APPLICATIONS

SCKO2: 256 f_S(f_S= 32, 44.1, 48, 64, 88.2, 96

kHz)

•

HDD + DVD Recorders

DVD Recorders

–

SCKO3: 384 f_S(f_S= 32, 44.1, 48, 64, 88.2, 96

kHz)

HDD Recorders

DVD Players

•

Zero PPM Error Output Clocks

Low Clock Jitter: 50 ps (Typical)

DVD Add-On Cards for Multimedia PCs

Digital HDTV Systems

Set-Top Boxes

Multiple Sampling Frequencies:

f_S= 32, 44.1, 48, 64, 88.2, 96 kHz

DESCRIPTION

The PLL1707 is a low-cost phase-locked loop (PLL) multiclock generator. The PLL1707 can generate four

system clocks from a 27-MHz reference input frequency. The clock outputs of the PLL1707 can be controlled by

sampling frequency-control pins. The device gives customers both cost and space savings by eliminating

external components and enables customers to achieve the very low-jitter performance needed for high

performance audio DACs and/or ADCs. The PLL1707 is ideal for MPEG-2 applications that use a 27-MHz

master clock such as DVD recorders, HDD recorders, DVD add-on cards for multimedia PCs, digital HDTV

systems, and set-top boxes.

FUNCTIONAL BLOCK DIAGRAM

FS2

FS1

CSEL

AGND

V 1–3 DGND1–3

Mode Control Interface

Power Supply

Reset

OSC

PLL2

XT1

XT2

PLL1

Divider

SCKO2

Divider

SCKO3

MCKO1 MCKO2

SCKO0

SCKO1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...18

中文翻译

下载PDF

与PLL1707-Q1相关器件

型号	品牌	获取价格	描述	数据表
PLL1708	BB	获取价格	3.3 V DUAL PLL MULTICLOCK GENERATOR
PLL1708	TI	获取价格	3.3-V DUAL PLL MULTICLOCK GENERATOR
PLL1708DBQ	BB	获取价格	3.3 V DUAL PLL MULTICLOCK GENERATOR
PLL1708DBQ	TI	获取价格	3.3-V DUAL PLL MULTICLOCK GENERATOR
PLL1708DBQG4	TI	获取价格	3.3 V Dual PLL Multi-Clock Generator 20-SSOP -25 to 85
PLL1708DBQR	BB	获取价格	3.3 V DUAL PLL MULTICLOCK GENERATOR
PLL1708DBQR	TI	获取价格	3.3-V DUAL PLL MULTICLOCK GENERATOR
PLL1708DBQRG4	TI	获取价格	4.096MHz 至 36.864MHz、串行控制、3.3V 双路 PLL 多时钟发生器
PLL1720A	ETC	获取价格	PHASE LOCKED LOOP
PLL1810A	ETC	获取价格	PHASE LOCKED LOOP