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PF5301-TO-92-3L-ROHS PDF预览

PF5301-TO-92-3L-ROHS

更新时间: 2024-01-05 21:56:59
品牌 Logo 应用领域
凌特 - Linear /
页数 文件大小 规格书
1页 206K
描述
Transistor,

PF5301-TO-92-3L-ROHS 技术参数

是否Rohs认证: 符合生命周期:Contact Manufacturer
包装说明:,Reach Compliance Code:compliant
风险等级:5.61FET 技术:JUNCTION
最高工作温度:150 °C极性/信道类型:N-CHANNEL
最大功率耗散 (Abs):0.3 W子类别:Other Transistors
表面贴装:NOBase Number Matches:1

PF5301-TO-92-3L-ROHS 数据手册

  
LS5301, PF5301  
VERY HIGH INPUT IMPEDANCE  
N-CHANNEL JFET  
FEATURES  
REPLACEMENT FOR LF5301, PF5301  
HIGH INPUT INPEDANCE  
HIGH GAIN  
IG = 0.100 pA  
gfs = 70 µS  
LS SERIES  
PF SERIES  
ABSOLUTE MAXIMUM RATINGS1  
@ 25 °C (unless otherwise stated), TA=25°C  
Maximum Temperatures  
Storage Temperature (TO-72)  
Storage Temperature (TO-92)  
Maximum Power Dissipation2  
Continuous Power Dissipation), TA=25°C  
Maximum Currents  
TO-72  
TOP VIEW  
-55 to 175°C  
-55 to 150°C  
300mW  
50mA  
Gate Current  
Maximum Voltages  
Gate to Drain  
-30V  
-30V  
Gate to Source  
COMMON ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated)  
SYMBOL  
BVGSS  
VGS(off)  
IGSS  
CHARACTERISTIC  
MIN TYP MAX UNIT  
CONDITIONS  
Gate to Source Breakdown Voltage  
Gate to Source Cutoff Voltage  
Gate Leakage Current  
-30  
VDS = 0V, ID = -1µA  
V
-0.6  
-3.0  
-1  
VDS = 10V, ID = 1nA  
VDS = 0V, VGS = -15V  
VDG = 6V, ID = 5µA  
pA  
IG  
Gate Operating Current  
-0.04  
IDSS  
Drain to Source Saturation Current  
Forward Transconductance  
Input Capacitance  
30  
70  
500  
300  
3
µA  
µS  
VDS = 10V, VGS = 0V  
VDS = 10V, VGS = 0V, f = 1kHz  
gfs  
Ciss  
pF  
VDS = 10V, VGS = 0V, f = 1MHz  
Crss  
Reverse Transfer Capacitance  
Equivalent Noise Voltage  
1.5  
en  
45  
150 nV/√Hz VDG = 10V, ID = 50µA, f = 100Hz  
NOTES  
1. Absolute maximum ratings are limiting values above which serviceability may be impaired.  
2. Derate PF series 2.8mW/° C when TA>25° C. Derate LS series 2.0mW°C when TA>25° C  
3. All MIN/TYP/MAX limits are absolute numbers. Negative signs indicated electrical polarity only.  
Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any  
infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent  
rights of Linear Integrated Systems.  
Linear Integrated Systems (LIS) is a 25-year-old, third-generation precision semiconductor company providing  
high-quality discrete components. Expertise brought to LIS is based on processes and products developed  
at Amelco, Union Carbide, Intersil and Micro Power Systems by company President John H. Hall. Hall,  
a protégé of Silicon Valley legend Dr. Jean Hoerni, was the director of IC Development at Union Carbide,  
co-founder and vice president of R&D at Intersil, and founder/president of Micro Power Systems.  
Linear Integrated Systems  
4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261  
Doc 201141 06/19/12 Rev#A10 ECN#LS5301 PF5301  

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