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P89LPC904 PDF预览

P89LPC904

更新时间: 2024-10-26 22:26:07
品牌 Logo 应用领域
恩智浦 - NXP 转换器闪存微控制器时钟
页数 文件大小 规格书
41页 182K
描述
8-bit microcontrollers with two-clock accelerated 80C51 core 1 kB 3 V byte-erasable Flash with 8-bit A/D converter

P89LPC904 数据手册

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P89LPC904  
8-bit microcontrollers with two-clock accelerated 80C51 core  
1 kB 3 V byte-erasable Flash with 8-bit A/D converter  
Rev. 02 — 25 June 2004  
Preliminary data  
1. General description  
The P89LPC904 is a single-chip microcontroller in a low-cost 8-pin package based  
on a high performance processor architecture that executes instructions in two to four  
clocks, six times the rate of standard 80C51 devices. Many system-level functions  
have been incorporated into the P89LPC904 in order to reduce component count,  
board space, and system cost.  
2. Features  
2.1 Principal features  
1 kB byte-erasable Flash code memory organized into 256-byte sectors and  
16-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile  
data storage.  
128-byte RAM data memory.  
Two 16-bit counter/timers.  
23-bit system timer that can also be used as a Real-Time clock.  
2 -input multiplexed A/D converter/single DAC output. Two analog comparators  
with selectable reference.  
Enhanced UART with fractional baud rate generator, break detect, framing error  
detection, automatic address detection and versatile interrupt capabilities.  
High-accuracy internal RC oscillator option allows operation without external  
oscillator components. The RC oscillator option is selectable and fine tunable.  
2.4 V to 3.6 V VDD operating range with 5 V tolerant I/O pins (may be pulled up or  
driven to 5.5 V). Industry-standard pinout with VDD, VSS, and reset at locations 1,  
8, and 4.  
Up to six I/O pins when using internal oscillator and reset options.  
8-pin SO-8 package.  
2.2 Additional features  
A high performance 80C51 CPU provides instruction cycle times of 167 ns to  
333 ns for all instructions except multiply and divide when executing at 12 MHz.  
This is six times the performance of the standard 80C51 running at the same  
clock frequency. A lower clock frequency for the same performance results in  
power savings and reduced EMI.  
In-Application Programming (IAP-Lite) and byte erase allows code memory to be  
used for non-volatile data storage.  

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