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P89LPC9107FDH,129 PDF预览

P89LPC9107FDH,129

更新时间: 2024-10-27 15:47:27
品牌 Logo 应用领域
恩智浦 - NXP 时钟PC光电二极管外围集成电路
页数 文件大小 规格书
61页 278K
描述
P89LPC9102/9103/9107 - 8-bit microcontrollers with two-clock accelerated 80C51 core 1 kB 3 V byte-erasable flash with 8-bit A/D converter TSSOP 14-Pin

P89LPC9107FDH,129 技术参数

Source Url Status Check Date:2013-06-14 00:00:00是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:4.40 MM, PLASTIC, MO-153, SOT-402-1, TSSOP-14针数:14
Reach Compliance Code:unknownHTS代码:8542.31.00.01
风险等级:5.78具有ADC:YES
其他特性:OPERATES AT 2.4V MINIMUM SUPPLY AT 12 MHZ地址总线宽度:
位大小:8最大时钟频率:18 MHz
DAC 通道:YESDMA 通道:NO
外部数据总线宽度:JESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:5 mm
湿度敏感等级:1I/O 线路数量:10
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °CPWM 通道:YES
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260认证状态:Not Qualified
ROM可编程性:FLASH座面最大高度:1.1 mm
速度:18 MHz最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:NICKEL PALLADIUM GOLD
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:4.4 mmuPs/uCs/外围集成电路类型:MICROCONTROLLER
Base Number Matches:1

P89LPC9107FDH,129 数据手册

 浏览型号P89LPC9107FDH,129的Datasheet PDF文件第2页浏览型号P89LPC9107FDH,129的Datasheet PDF文件第3页浏览型号P89LPC9107FDH,129的Datasheet PDF文件第4页浏览型号P89LPC9107FDH,129的Datasheet PDF文件第5页浏览型号P89LPC9107FDH,129的Datasheet PDF文件第6页浏览型号P89LPC9107FDH,129的Datasheet PDF文件第7页 
P89LPC9102/9103/9107  
8-bit microcontrollers with two-clock accelerated 80C51 core  
1 kB 3 V byte-erasable flash with 8-bit A/D converter  
Rev. 03 — 10 July 2007  
Product data sheet  
1. General description  
The P89LPC9102/9103/9107 are single-chip microcontrollers in low-cost 10-pin and  
14-pin packages based on a high performance processor architecture that executes  
instructions in two to four clocks, six times the rate of standard 80C51 devices. Many  
system-level functions have been incorporated into the P89LPC9102/9103/9107 in order  
to reduce component count, board space, and system cost.  
2. Features  
2.1 Principal features  
I 1 kB byte-erasable flash code memory organized into 256-byte sectors and 16-byte  
pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.  
I 128-byte RAM data memory.  
I Two 16-bit timer/counters (P89LPC9102/9107). Two 16-bit timers (P89LPC9103)  
I 23-bit system timer that can also be used as a RTC.  
I Four input multiplexed 8-bit A/D converter/single DAC output. One analog comparator  
with selectable reference.  
I Enhanced UART with fractional baud rate generator, break detect, framing error  
detection, automatic address detection and versatile interrupt capabilities  
(P89LPC9103/9107).  
I High-accuracy internal RC oscillator option, factory calibrated to 1 %, allows operation  
without external oscillator components. The RC oscillator option is selectable and fine  
tunable.  
I VDD operating range of 2.4 V to 3.6 V with 5 V tolerant I/O pins (may be pulled up or  
driven to 5.5 V).  
I Up to 10 (P89LPC9107) or eight (P89LPC9102/9103) I/O pins when using internal  
oscillator and reset options.  
I Ultra-small 10-pin HVSON package (P89LPC9102/9103). 14-pin TSSOP and DIP  
packages (P89LPC9107).  
2.2 Additional features  
I A high performance 80C51 CPU provides instruction cycle times of 136 ns to 272 ns  
for all instructions except multiply and divide when using the internal 7.3728 MHz RC  
oscillator in clock doubling mode (111 ns to 222 ns when using an external 18 MHz  
clock). A lower clock frequency for the same performance results in power savings and  
reduced EMI.  
 
 
 
 

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