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P4C163L-35FM PDF预览

P4C163L-35FM

更新时间: 2024-10-26 20:18:23
品牌 Logo 应用领域
PYRAMID 静态存储器内存集成电路
页数 文件大小 规格书
8页 84K
描述
Standard SRAM, 8KX9, 35ns, CMOS, CDFP28, CERAMIC, DFP-28

P4C163L-35FM 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Active零件包装代码:DFP
包装说明:DFP, FL28,.4针数:28
Reach Compliance Code:compliantECCN代码:3A001.A.2.C
HTS代码:8542.32.00.41风险等级:5.12
Is Samacsys:N最长访问时间:35 ns
I/O 类型:COMMONJESD-30 代码:R-GDFP-F28
JESD-609代码:e0内存密度:73728 bit
内存集成电路类型:STANDARD SRAM内存宽度:9
功能数量:1端子数量:28
字数:8192 words字数代码:8000
工作模式:ASYNCHRONOUS最高工作温度:125 °C
最低工作温度:-55 °C组织:8KX9
输出特性:3-STATE封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DFP封装等效代码:FL28,.4
封装形状:RECTANGULAR封装形式:FLATPACK
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V认证状态:Not Qualified
座面最大高度:2.286 mm最大待机电流:0.0002 A
最小待机电流:2 V子类别:SRAMs
最大压摆率:0.12 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:TIN LEAD
端子形式:FLAT端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:9.017 mmBase Number Matches:1

P4C163L-35FM 数据手册

 浏览型号P4C163L-35FM的Datasheet PDF文件第2页浏览型号P4C163L-35FM的Datasheet PDF文件第3页浏览型号P4C163L-35FM的Datasheet PDF文件第4页浏览型号P4C163L-35FM的Datasheet PDF文件第5页浏览型号P4C163L-35FM的Datasheet PDF文件第6页浏览型号P4C163L-35FM的Datasheet PDF文件第7页 
P4C163/P4C163L  
ULTRA HIGH SPEED 8K x 9  
STATIC CMOS RAMS  
FEATURES  
Full CMOS, 6T Cell  
Single 5V±10% Power Supply  
High Speed (Equal Access and Cycle Times)  
– 25/35ns (Commercial)  
Data Retention with 2.0V Supply, 10 µA Typical  
Current (P4C163L Military)  
– 25/35/45ns (Military)  
Common I/O  
Low Power Operation (Commercial/Military)  
– 690/800 mW Active – 25  
– 193/220 mW Standby (TTL Input)  
– 5.5 mW Standby (CMOS Input) P4C163L  
Fully TTL Compatible Inputs and Outputs  
Standard Pinout (JEDEC Approved)  
– 28-Pin 300 mil DIP, SOJ  
– 28-Pin 350 x 550 mil LCC  
– 28-Pin CERPACK  
Output Enable and Dual Chip Enable Control  
Functions  
DESCRIPTION  
Access times as fast as 25 nanoseconds are available, per-  
mitting greatly enhanced system operating speeds. CMOS  
is used to reduce power consumption in both active and  
standby modes.  
The P4C163 and P4C163L are 73,728-bit ultra high-speed  
static RAMs organized as 8K x 9. The CMOS memories re-  
quire no clocks or refreshing and have equal access and  
cycle times. Inputs are fully TTL-compatible. The RAMs op-  
erate from a single 5V±10% tolerance power supply. With  
battery backup, data integrity is maintained for supply volt-  
agesdownto2.0V.Currentdrainis10µAfroma2.0Vsupply.  
The P4C163 and P4C163L are available in 28-pin 300 mil  
DIPandSOJand28-pin350x550milLCCpackagesprovid-  
ing excellent board level densities.  
FUNCTIONAL BLOCK DIAGRAM  
PIN CONFIGURATIONS  
A0  
A
A
A
A
A
V
CC  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
3
27  
26  
0
1
2
3
73,728-BIT  
ROW  
MEMORY  
SELECT  
ARRAY  
2
A
A
A
A
A
A
4
5
6
7
8
9
CE  
A
WE  
2
3
4
2
28  
CE  
3
2
1
25  
24  
23  
22  
21  
20  
19  
18  
12  
4
A
12  
A
11  
A7  
A
A
5
6
7
8
1
11  
10  
4
5
6
7
8
5
A
A
A
A
I/O1  
A
10  
6
OE  
7
INPUT  
OE  
DATA  
COLUMN I/O  
A
9
8
A
9
CONTROL  
I/O  
I/O  
I/O  
10  
11  
12  
9
CE  
I/O  
1
I/O9  
CE1  
I/O  
10  
11  
12  
13  
14  
9
1
I/O  
9
8
2
3
I/O  
2
14 15 16  
I/O  
I/O  
I/O  
I/O  
I/O  
COLUMN  
SELECT  
8
I/O  
3
13  
17  
7
6
5
I/O  
4
CE  
CE  
GND  
1
2
A8  
A12  
WE  
DIP (P5, C5), SOJ (J5)  
LCC (L5)  
CERPACK (F4) SIMILAR  
TOP VIEW  
TOP VIEW  
OE  
Means Quality, Service and Speed  
1Q97  
109  

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