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OMAPL137BZKBT3 PDF预览

OMAPL137BZKBT3

更新时间: 2024-01-20 07:13:11
品牌 Logo 应用领域
德州仪器 - TI 时钟外围集成电路
页数 文件大小 规格书
223页 1314K
描述
OMAP-L137 Low-Power Applications Processor

OMAPL137BZKBT3 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:BGA
包装说明:BGA, BGA256,16X16,40针数:256
Reach Compliance Code:compliantECCN代码:3A001.A.3
HTS代码:8542.31.00.01Factory Lead Time:1 week
风险等级:8.43其他特性:IT ALSO OPERATES AT 3.3 OR 1.8 V FOR I/O SUPPLY
地址总线宽度:13桶式移位器:NO
边界扫描:YES最大时钟频率:375 MHz
外部数据总线宽度:16格式:FLOATING POINT
内部总线架构:MULTIPLEJESD-30 代码:S-PBGA-B256
JESD-609代码:e1长度:17 mm
低功率模式:YES湿度敏感等级:3
端子数量:256最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:BGA封装等效代码:BGA256,16X16,40
封装形状:SQUARE封装形式:GRID ARRAY
峰值回流温度(摄氏度):260电源:1.2,1.8/3.3 V
认证状态:Not Qualified座面最大高度:2.05 mm
子类别:Other Microprocessor ICs最大供电电压:1.32 V
最小供电电压:1.14 V标称供电电压:1.2 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Tin/Silver/Copper (Sn/Ag/Cu)
端子形式:BALL端子节距:1 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:17 mmuPs/uCs/外围集成电路类型:DIGITAL SIGNAL PROCESSOR, OTHER
Base Number Matches:1

OMAPL137BZKBT3 数据手册

 浏览型号OMAPL137BZKBT3的Datasheet PDF文件第2页浏览型号OMAPL137BZKBT3的Datasheet PDF文件第3页浏览型号OMAPL137BZKBT3的Datasheet PDF文件第4页浏览型号OMAPL137BZKBT3的Datasheet PDF文件第5页浏览型号OMAPL137BZKBT3的Datasheet PDF文件第6页浏览型号OMAPL137BZKBT3的Datasheet PDF文件第7页 
Sample &  
Buy  
Support &  
Community  
Product  
Folder  
Tools &  
Software  
Technical  
Documents  
OMAP-L137  
www.ti.com  
SPRS563F SEPTEMBER 2008REVISED FEBRUARY 2013  
OMAP-L137 Low-Power Applications Processor  
Check for Samples: OMAP-L137  
1 OMAP-L137 Low-Power Applications Processor  
1.1 Features  
1234  
– 8K-Byte RAM (Vector Table)  
• Highlights  
– 64K-Byte ROM  
– Dual Core SoC  
• C674x Instruction Set Features  
375/456-MHz ARM926EJ-S™ RISC MPU  
375/456-MHz C674x VLIW DSP  
– Superset of the C67x+™ and C64x+™ ISAs  
– Up to 3648/2736 C674x MIPS/MFLOPS  
– Byte-Addressable (8-/16-/32-/64-Bit Data)  
– 8-Bit Overflow Protection  
– TMS320C674x Fixed/Floating-Point VLIW  
DSP Core  
– Enhanced Direct-Memory-Access Controller  
3 (EDMA3)  
– Bit-Field Extract, Set, Clear  
– 128K-Byte RAM Shared Memory  
– Two External Memory Interfaces  
– Normalization, Saturation, Bit-Counting  
– Compact 16-Bit Instructions  
– Three Configurable 16550 type UART  
Modules  
– LCD Controller  
• C674x Two Level Cache Memory Architecture  
– 32K-Byte L1P Program RAM/Cache  
– 32K-Byte L1D Data RAM/Cache  
– Two Serial Peripheral Interfaces (SPI)  
– Multimedia Card (MMC)/Secure Digital (SD)  
– Two Master/Slave Inter-Integrated Circuit  
– One Host-Port Interface (HPI)  
– 256K-Byte L2 Unified Mapped RAM/Cache  
– Flexible RAM/Cache Partition (L1 and L2)  
• Enhanced Direct-Memory-Access Controller 3  
(EDMA3):  
– USB 1.1 OHCI (Host) With Integrated PHY  
(USB1)  
• Applications  
– 2 Transfer Controllers  
– 32 Independent DMA Channels  
– 8 Quick DMA Channels  
– Industrial Diagnostics  
– Test and measurement  
– Military Sonar/ Radar  
– Programmable Transfer Burst Size  
• TMS320C674x Fixed/Floating-Point VLIW DSP  
Core  
– Medical measurement  
– Professional Audio  
– Load-Store Architecture With Non-Aligned  
Support  
• Software Support  
– 64 General-Purpose Registers (32 Bit)  
– Six ALU (32-/40-Bit) Functional Units  
– TI DSP/BIOS™  
– Chip Support Library and DSP Library  
• Dual Core SoC  
– 375/456-MHz ARM926EJ-S™ RISC MPU  
– 375/456-MHz C674x VLIW DSP  
• ARM926EJ-S Core  
Supports 32-Bit Integer, SP (IEEE Single  
Precision/32-Bit) and DP (IEEE Double  
Precision/64-Bit) Floating Point  
Supports up to Four SP Additions Per  
Clock, Four DP Additions Every 2 Clocks  
Supports up to Two Floating Point (SP or  
DP) Reciprocal Approximation (RCPxP)  
and Square-Root Reciprocal  
Approximation (RSQRxP) Operations Per  
Cycle  
– 32-Bit and 16-Bit (Thumb®) Instructions  
– DSP Instruction Extensions  
– Single Cycle MAC  
– ARM™ Jazelle® Technology  
– EmbeddedICE-RT™ for Real-Time Debug  
• ARM9 Memory Architecture  
– 16K-Byte Instruction Cache  
– 16K-Byte Data Cache  
– Two Multiply Functional Units  
Mixed-Precision IEEE Floating Point  
Multiply Supported up to:  
2 SP x SP -> SP Per Clock  
2 SP x SP -> DP Every Two Clocks  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
DSP/BIOS, TMS320C6000, C6000 are trademarks of Texas Instruments.  
ARM926EJ-S, ETM9, CoreSight are trademarks of ARM Limited.  
All other trademarks are the property of their respective owners.  
2
3
4
PRODUCTION DATA information is current as of publication date. Products conform to  
specifications per the terms of the Texas Instruments standard warranty. Production  
processing does not necessarily include testing of all parameters.  
Copyright © 2008–2013, Texas Instruments Incorporated  
 
 

OMAPL137BZKBT3 替代型号

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