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NSTB1005DXV5T1 PDF预览

NSTB1005DXV5T1

更新时间: 2024-10-28 03:31:11
品牌 Logo 应用领域
安森美 - ONSEMI 晶体晶体管
页数 文件大小 规格书
6页 63K
描述
Dual Common Base-Collector Bias Resistor Transistors

NSTB1005DXV5T1 技术参数

是否无铅: 不含铅生命周期:Obsolete
包装说明:CASE 463B-01, 5 PIN针数:5
Reach Compliance Code:unknownECCN代码:EAR99
风险等级:5.55其他特性:BUILT IN BIAS RESISTOR RATIO IS 1
最大集电极电流 (IC):0.1 A集电极-发射极最大电压:50 V
配置:CASCADED, 2 ELEMENTS WITH BUILT-IN RESISTOR最小直流电流增益 (hFE):80
JESD-30 代码:R-PDSO-F5JESD-609代码:e3
湿度敏感等级:1元件数量:2
端子数量:5封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260极性/信道类型:NPN AND PNP
最大功率耗散 (Abs):0.5 W认证状态:Not Qualified
子类别:BIP General Purpose Small Signal表面贴装:YES
端子面层:Tin (Sn)端子形式:FLAT
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
晶体管应用:SWITCHING晶体管元件材料:SILICON
Base Number Matches:1

NSTB1005DXV5T1 数据手册

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NSTB1005DXV5T1,  
NSTB1005DXV5T5  
Preferred Devices  
Dual Common  
Base−Collector Bias  
Resistor Transistors  
http://onsemi.com  
NPN and PNP Silicon Surface Mount  
Transistors with Monolithic Bias  
Resistor Network  
3
2
1
R1  
R2  
The BRT (Bias Resistor Transistor) contains a single transistor with  
a monolithic bias network consisting of two resistors; a series base  
resistor and a base−emitter resistor. These digital transistors are  
designed to replace a single device and its external resistor bias  
network. The BRT eliminates these individual components by  
integrating them into a single device. The NSTB1005DXV5T1  
contains two complementary BRT devices are housed in the SOT−553  
package which is ideal for low power surface mount applications  
where board space is at a premium.  
Q2  
R2  
Q1  
R1  
4
5
Simplifies Circuit Design  
Reduces Board Space  
5
Reduces Component Count  
Available in 8 mm, 7 inch Tape and Reel  
Lead Free  
1
SOT−553  
CASE 463B  
MARKING DIAGRAM  
MAXIMUM RATINGS (T = 25°C unless otherwise noted, common for Q  
A
1
and Q , − minus sign for Q (PNP) omitted)  
2
1
5
Rating  
Symbol  
Value  
50  
Unit  
UC D  
Collector-Base Voltage  
Collector-Emitter Voltage  
Collector Current  
V
Vdc  
Vdc  
CBO  
CEO  
1
V
50  
UC = Specific Device Code  
= Date Code  
I
C
100  
mAdc  
D
THERMAL CHARACTERISTICS  
Characteristic  
(One Junction Heated)  
Symbol  
Max  
Unit  
ORDERING INFORMATION  
Total Device Dissipation  
P
D
Device  
Package  
Shipping  
357 (Note 1)  
2.9 (Note 1)  
mW  
mW/°C  
T = 25°C  
A
NSTB1005DXV5T1 SOT−553  
4 mm pitch  
Derate above 25°C  
4000/Tape & Reel  
Thermal Resistance −  
Junction-to-Ambient  
R
350 (Note 1)  
°C/W  
q
JA  
NSTB1005DXV5T5 SOT−553  
2 mm pitch  
8000/Tape & Reel  
Characteristic  
(Both Junctions Heated)  
Symbol  
Max  
Unit  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specification  
Brochure, BRD8011/D.  
Total Device Dissipation  
T = 25°C  
Derate above 25°C  
P
D
500 (Note 1)  
4.0 (Note 1)  
mW  
A
mW/°C  
Thermal Resistance −  
Junction-to-Ambient  
R
250 (Note 1)  
55 to +150  
°C/W  
q
JA  
Preferred devices are recommended choices for future use  
and best overall value.  
Junction and Storage Temperature  
1. FR−4 @ Minimum Pad  
T , T  
J stg  
°C  
Semiconductor Components Industries, LLC, 2004  
1
Publication Order Number:  
March, 2004 − Rev. 0  
NSTB1005DXV5/D  
 

NSTB1005DXV5T1 替代型号

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