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NS32491A

更新时间: 2024-11-12 23:54:27
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NS32491A 数据手册

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July 1993  
DP8391A/NS32491A SNI Serial Network Interface  
Y
10 Mb/s Manchester encoding/decoding with receive  
clock recovery  
General Description  
The DP8391A Serial Network Interface (SNI) provides the  
Manchester data encoding and decoding functions for  
IEEE 802.3 Ethernet/Cheapernet type local area networks.  
The SNI interfaces the DP8390 Network Interface Controller  
(NIC) to the Ethernet transceiver cable. When transmitting,  
the SNI converts non-return-to-zero (NRZ) data from the  
controller and clock pulses into Manchester encoding and  
sends the converted data differentially to the transceiver.  
The opposite process occurs on the receive path, where a  
digital phase-locked loop decodes 10 Mbit/s signals with as  
Y
Patented digital phase locked loop (DPLL) decoder re-  
quires no precision external components  
Y
Y
Y
g
Decodes Manchester data with up to 18 ns of jitter  
Loopback capability for diagnostics  
Externally selectable half or full step modes of opera-  
tion at transmit output  
Y
Squelch circuits at the receive and collision inputs re-  
ject noise  
Y
Y
Y
High voltage protection at transceiver interface (16V)  
TTL/MOS compatible controller interface  
Connects directly to the transceiver (AUI) cable  
g
much as 18 ns of jitter.  
The DP8391A SNI is a functionally complete Manchester  
encoder/decoder including ECL like balanced driver and re-  
ceivers, on board crystal oscillator, collision signal transla-  
tor, and a diagnostic loopback circuit.  
Table of Contents  
1.0 System Diagram  
The SNI is part of a three chip set that implements the com-  
plete IEEE compatible network node electronics as shown  
below. The other two chips are the DP8392 Coax Transceiv-  
er Interface (CTI) and the DP8390 Network Interface Con-  
troller (NIC).  
2.0 Block Diagram  
3.0 Functional Description  
3.1  
3.2  
3.3  
3.4  
3.5  
Oscillator  
Encoder  
Incorporated into the CTI are the transceiver, collision and  
jabber functions. The Media Access Protocol and the buffer  
management tasks are performed by the NIC. There is an  
isolation requirement on signal and power lines between the  
CTI and the SNI. This is usually accomplished by using a set  
of miniature pulse transformers that come in a 16-pin plastic  
DIP for signal lines. Power isolation, however, is done by  
using a DC to DC converter.  
Decoder  
Collision Translator  
Loopback  
4.0 Connection Diagrams  
5.0 Pin Descriptions  
6.0 Absolute Maximum Ratings  
7.0 Electrical Characteristics  
8.0 Switching Characteristics  
9.0 Timing and Load Diagrams  
10.0 Physical Dimensions  
Features  
Y
Compatible with Ethernet II, IEEE 802.3; 10Base5,  
10Base2, and 10Base-T  
1.0 System Diagram  
IEEE 802.3 Compatible Ethernet/Cheapernet Local Area Network Chip Set  
TL/F/9357–1  
C
1995 National Semiconductor Corporation  
TL/F/9357  
RRD-B30M105/Printed in U. S. A.  

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