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NM27LV010VE150 PDF预览

NM27LV010VE150

更新时间: 2024-09-09 15:46:39
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD OTP只读存储器内存集成电路
页数 文件大小 规格书
10页 100K
描述
OTP ROM, 128KX8, 150ns, CMOS, PQCC32, PLASTIC, LCC-32

NM27LV010VE150 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QFJ
包装说明:PLASTIC, LCC-32针数:32
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.71风险等级:5.76
最长访问时间:150 nsI/O 类型:COMMON
JESD-30 代码:R-PQCC-J32JESD-609代码:e0
长度:13.995 mm内存密度:1048576 bit
内存集成电路类型:OTP ROM内存宽度:8
功能数量:1端子数量:32
字数:131072 words字数代码:128000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:128KX8
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC32,.5X.6
封装形状:RECTANGULAR封装形式:CHIP CARRIER
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 V认证状态:Not Qualified
座面最大高度:3.56 mm最大待机电流:0.00005 A
子类别:OTP ROMs最大压摆率:0.015 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:11.455 mm
Base Number Matches:1

NM27LV010VE150 数据手册

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July 1998  
NM27LV010  
1,048,576-Bit (128k x 8) Low Voltage EPROM  
General Description  
Features  
The NM27LV010 is a high performance Low Voltage Electrically  
Programmable Read Only Memory. It is manufactured using  
Fairchild’s AMG™ EPROM technology. This technology allows  
the part to operate at speeds as fast as 200 ns.  
3.0V to 3.6V operation  
200 ns access time  
Low current operation  
—8 mA ICC active current @ 5 MHz (typ.)  
20µA ICC standby current @ 5 MHz (typ.)  
This Low Voltage and Low Power EPROM is designed with power  
sensitive hand held and portable battery products in mind. This  
allows for code storage of firmware for applications like notebook  
computers, palm top computers, cellular phones, and HDD.  
Ultra low power operation  
66 µW standby power @ 3.3V  
50 mW active power @ 3.3V  
Small outline packages are just as critical to portable applications  
as Low Voltage and Low Power.  
Surface mount package options|  
32-pin TSOP  
32-pin PLCC  
The NM27LV010 is one member of Fairchild’s growing Low  
Voltage product Family.  
Block Diagram  
V
cc  
Data Outputs O - O  
0
7
GND  
V
pp  
OE  
PGM  
CE  
Output Enable,  
Chip Enable &  
Program Logic  
Output  
Buffers  
Y
Decoder  
1,048,576-Bit  
Cell Matrix  
A
- A  
16  
0
Address  
Inputs  
X
Decoder  
DS011377-1  
AMG™ is a trademark of WSI, Incorporated.  
1
© 1998 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  

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