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NM27LV010VE250 PDF预览

NM27LV010VE250

更新时间: 2024-09-09 02:52:51
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 内存集成电路可编程只读存储器OTP只读存储器电动程控只读存储器
页数 文件大小 规格书
10页 104K
描述
1,048,576-Bit (128k x 8) Low Voltage EPROM

NM27LV010VE250 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFJ包装说明:QCCJ, LDCC32,.5X.6
针数:32Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.76最长访问时间:250 ns
I/O 类型:COMMONJESD-30 代码:R-PQCC-J32
JESD-609代码:e0长度:13.995 mm
内存密度:1048576 bit内存集成电路类型:OTP ROM
内存宽度:8功能数量:1
端子数量:32字数:131072 words
字数代码:128000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:128KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC32,.5X.6封装形状:RECTANGULAR
封装形式:CHIP CARRIER并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
认证状态:Not Qualified座面最大高度:3.56 mm
最大待机电流:0.00005 A子类别:OTP ROMs
最大压摆率:0.015 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:11.455 mmBase Number Matches:1

NM27LV010VE250 数据手册

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July 1998  
NM27LV010  
1,048,576-Bit (128k x 8) Low Voltage EPROM  
General Description  
Features  
The NM27LV010 is a high performance Low Voltage Electrically  
Programmable Read Only Memory. It is manufactured using  
Fairchild’s AMG™ EPROM technology. This technology allows  
the part to operate at speeds as fast as 200 ns.  
3.0V to 3.6V operation  
200 ns access time  
Low current operation  
—8 mA ICC active current @ 5 MHz (typ.)  
20µA ICC standby current @ 5 MHz (typ.)  
This Low Voltage and Low Power EPROM is designed with power  
sensitive hand held and portable battery products in mind. This  
allows for code storage of firmware for applications like notebook  
computers, palm top computers, cellular phones, and HDD.  
Ultra low power operation  
66 µW standby power @ 3.3V  
50 mW active power @ 3.3V  
Small outline packages are just as critical to portable applications  
as Low Voltage and Low Power.  
Surface mount package options|  
32-pin TSOP  
32-pin PLCC  
The NM27LV010 is one member of Fairchild’s growing Low  
Voltage product Family.  
Block Diagram  
V
cc  
Data Outputs O - O  
0
7
GND  
V
pp  
OE  
PGM  
CE  
Output Enable,  
Chip Enable &  
Program Logic  
Output  
Buffers  
Y
Decoder  
1,048,576-Bit  
Cell Matrix  
A
- A  
16  
0
Address  
Inputs  
X
Decoder  
DS011377-1  
AMG™ is a trademark of WSI, Incorporated.  
1
© 1998 Fairchild Semiconductor Corporation  
www.fairchildsemi.com