NM25C640LEM8X

更新时间： 2024-11-06 13:11:59

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		存储内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数	文件大小	规格书
10页	97K
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中文翻译

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数据手册

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NM25C640LEM8X 数据手册

PRELIMINARY

March 1999

NM25C640

64K-Bit Serial CMOS EEPROM

(Serial Peripheral Interface (SPI) Synchronous Bus)

General Description

Features

The NM25C640 is a 65,536-bit CMOS EEPROM with an SPI

compatible serial interface. The NM25C640 is designed for data

storage in applications requiring both non-volatile memory and in-

systemdataupdates. ThisEEPROMiswellsuitedforapplications

using the 68HC11 series of microcontrollers that support the SPI

interface for high speed communication with peripheral devices

via a serial bus to reduce pin count. The NM25C640 is imple-

mented in Fairchild Semiconductor’s floating gate CMOS process

that provides superior endurance and data retention.

■ 2.75 MHz clock rate @ 4.5V to 5.5V

2.1 MHz @ 2.7V to 4.5V

■ 65,536 bits organized as 8,192 x 8

■ Multiple chips on the same 3-wire bus with separate chip

select lines

■ Self-timed programming cycle

■ Simultaneous programming of 1 to 32 bytes at a time

■ Status register can be polled during programming to monitor

READY/BUSY

The serial data transmission of this device requires four signal

lines to control the device operation: Chip Select (CS), Clock

(SCK), Data In (SI), and Serial Data Out (SO). All programming

cycles are completely self-timed and do not require an erase

before WRITE.

■ Write Protect (WP) pin and write disable instruction for both

hardware and software write protection

■ Block write protect feature to protect against accidental

writes

BLOCK WRITE protection is provided by programming the STA-

TUS REGISTER with one of four levels of write protection.

Additionally, separate WRITE enable and WRITE disable instruc-

tions are provided for data protection.

■ Endurance: 1,000,000 data changes

■ Data retention greater than 40 years

■ Packages available: 8-pin DIP or 8-Pin SO

Hardware data protection is provided by the WP pin to protect

against inadvertent programming. The HOLD pin allows the serial

communication to be suspended without resetting the serial

sequence.

Block Diagram

HOLD

SCK

V_CC

V_SS

Instruction

Decoder

Control Logic

and Clock

Instruction

Generators

Program

Enable

Address

Counter/

High Voltage

Generator

and

Program

Timer

V_PP

EEPROM Array

65,536 Bits

(8,192 x 8)

Decoder

1 of 8,192

Read/Write Amps

Data In/Out Register

8 Bits

Data Out

Buffer

Non-Volatile

Status Register

DS500041-1

NM25C640 Rev. D.2

www.fairchildsemi.com

12 3 4 5 6 7...10

中文翻译

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与NM25C640LEM8X相关器件

型号	品牌	获取价格	描述	数据表
NM25C640LEN	FAIRCHILD	获取价格	SPI Serial EEPROM
NM25C640LM8	FAIRCHILD	获取价格	SPI Serial EEPROM
NM25C640LM8X	FAIRCHILD	获取价格	EEPROM, 8KX8, Serial, CMOS, PDSO8, 0.150 INCH, PLASTIC, SOIC-8
NM25C640LN	FAIRCHILD	获取价格	SPI Serial EEPROM
NM25C640LVM8	FAIRCHILD	获取价格	SPI Serial EEPROM
NM25C640LVN	FAIRCHILD	获取价格	SPI Serial EEPROM
NM25C640LZEM8	FAIRCHILD	获取价格	SPI Serial EEPROM
NM25C640LZEN	FAIRCHILD	获取价格	SPI Serial EEPROM
NM25C640LZM8	FAIRCHILD	获取价格	SPI Serial EEPROM
NM25C640LZN	FAIRCHILD	获取价格	SPI Serial EEPROM

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