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NLV74HC08ADR2G PDF预览

NLV74HC08ADR2G

更新时间: 2024-11-26 01:14:15
品牌 Logo 应用领域
安森美 - ONSEMI 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
7页 125K
描述
Quad 2-Input AND Gate

NLV74HC08ADR2G 技术参数

是否无铅: 不含铅生命周期:Active
零件包装代码:SOIC包装说明:HALOGEN FREE AND ROHS COMPLIANT, SOIC-14
针数:14Reach Compliance Code:compliant
HTS代码:8542.39.00.01Factory Lead Time:51 weeks
风险等级:1.66系列:HC/UH
JESD-30 代码:R-PDSO-G14JESD-609代码:e3
长度:8.65 mm负载电容(CL):50 pF
逻辑集成电路类型:AND GATE最大I(ol):0.004 A
湿度敏感等级:1功能数量:4
输入次数:2端子数量:14
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/6 V
Prop。Delay @ Nom-Sup:22 ns认证状态:Not Qualified
施密特触发器:NO筛选级别:AEC-Q100
座面最大高度:1.75 mm子类别:Gates
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9 mm
Base Number Matches:1

NLV74HC08ADR2G 数据手册

 浏览型号NLV74HC08ADR2G的Datasheet PDF文件第2页浏览型号NLV74HC08ADR2G的Datasheet PDF文件第3页浏览型号NLV74HC08ADR2G的Datasheet PDF文件第4页浏览型号NLV74HC08ADR2G的Datasheet PDF文件第5页浏览型号NLV74HC08ADR2G的Datasheet PDF文件第6页浏览型号NLV74HC08ADR2G的Datasheet PDF文件第7页 
MC74HC08A  
Quad 2-Input AND Gate  
HighPerformance SiliconGate CMOS  
The MC74HC08A is identical in pinout to the LS08. The device  
inputs are compatible with Standard CMOS outputs; with pullup  
resistors, they are compatible with LSTTL outputs.  
http://onsemi.com  
MARKING  
Features  
Output Drive Capability: 10 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS and TTL  
Operating Voltage Range: 2.0 to 6.0 V  
Low Input Current: 1 mA  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance With the JEDEC Standard No. 7A Requirements  
Chip Complexity: 24 FETs or 6 Equivalent Gates  
NLV Prefix for Automotive and Other Applications Requiring  
Unique Site and Control Change Requirements; AECQ100  
Qualified and PPAP Capable  
These Devices are PbFree, Halogen Free and are RoHS Compliant  
DIAGRAMS  
14  
SOIC14  
D SUFFIX  
CASE 751A  
HC08AG  
AWLYWW  
14  
14  
1
1
14  
HC  
08A  
ALYWG  
G
TSSOP14  
DT SUFFIX  
CASE 948G  
1
1
LOGIC DIAGRAM  
1
A
L, WL  
Y, YY  
= Assembly Location  
= Wafer Lot  
= Year  
A1  
3
Y1  
2
B1  
W, WW = Work Week  
4
A2  
G or G  
= PbFree Package  
6
Y2  
5
(Note: Microdot may be in either location)  
B2  
Y = AB  
9
A3  
FUNCTION TABLE  
8
Y3  
10  
B3  
12  
Inputs  
Output  
Y
A
B
A4  
11  
Y4  
13  
L
L
L
H
L
L
L
B4  
PIN 14 = V  
CC  
PIN 7 = GND  
H
H
L
H
H
Pinout: 14Lead Packages (Top View)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
V
CC  
B4  
13  
A4  
12  
Y4  
11  
B3  
10  
A3  
9
Y3  
8
14  
1
2
3
4
5
6
7
A1  
B1  
Y1  
A2  
B2  
Y2 GND  
© Semiconductor Components Industries, LLC, 2013  
1
Publication Order Number:  
October, 2013 Rev. 13  
MC74HC08A/D  

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