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NLAST4052/D PDF预览

NLAST4052/D

更新时间: 2024-11-19 23:53:51
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其他 - ETC 解复用器
页数 文件大小 规格书
16页 130K
描述
Analog Multiplexer/ Demultiplexer

NLAST4052/D 数据手册

 浏览型号NLAST4052/D的Datasheet PDF文件第2页浏览型号NLAST4052/D的Datasheet PDF文件第3页浏览型号NLAST4052/D的Datasheet PDF文件第4页浏览型号NLAST4052/D的Datasheet PDF文件第5页浏览型号NLAST4052/D的Datasheet PDF文件第6页浏览型号NLAST4052/D的Datasheet PDF文件第7页 
NLAST4052  
Analog Multiplexer/  
Demultiplexer  
TTL Compatible, Double–Pole, 4–Position  
Plus Common Off  
http://onsemi.com  
MARKING DIAGRAMS  
The NLAST4052 is an improved version of the MC14052 and  
MC74HC4052 fabricated in sub–micron Silicon Gate CMOS  
technology for lower R  
resistance and improved linearity with  
DS(on)  
low current. This device may be operated either with a single supply or  
16  
dual supply up to ±3 V to pass a 6 V signal without coupling  
9
PP  
capacitors.  
NLAST4052  
AWLYWW  
When operating in single supply mode, it is only necessary to tie  
SO–16  
D SUFFIX  
CASE 751B  
1
8
V , pin 7 to ground. For dual supply operation, V is tied to a  
EE  
EE  
negative voltage, not to exceed maximum ratings. Translation is  
provided in the device, the Address and Inhibit pins are standard TTL  
level compatible. For CMOS compatibility see NLAS4052. Pin for  
pin compatible with all industry standard versions of ‘4052.’  
16  
9
NLAST  
ALYW  
Improved R  
Specifications  
DS(on)  
TSSOP–16  
DT SUFFIX  
CASE 948F  
Pin for Pin Replacement for MAX4052 and MAX4052A  
1
8
9
– One Half the Resistance Operating at 5.0 Volts  
Single or Dual Supply Operation  
16  
– Single 3–5 Volt Operation, or Dual ±3 Volt Operation  
– With V of 3.0 to 3.3 V, Device Can Interface with 1.8 V Logic,  
No Translators Needed  
– Address and Inhibit pins are Logic is Over–Voltage Tolerant and –  
CC  
NLAST  
4052  
ALYW  
QSOP–16  
QS SUFFIX  
CASE 492  
May Be Driven Up +6 V Regardless of V  
CC  
1
8
Address and Inhibit pins are Standard TTL Compatible  
– Greatly Improved Noise Margin Over MAX4052 and MAX4052A  
A
L, WL  
Y
= Assembly Location  
= Wafer Lot  
– True TTL Compatibility V = 0.8 V, V = 2.0 V  
IL  
IH  
= Year  
Improved Linearity Over Standard HC4052 Devices  
W
= Work Week  
Popular SOIC, and Space Saving TSSOP, and QSOP 16 Pin  
Packages  
ORDERING INFORMATION  
Device  
Package  
Shipping  
NLAST4052D  
SO–16  
SO–16  
48 Units/Rail  
NLAST4052DR2  
2500 Units/Reel  
NLAST4052DT  
NLAST4052DTR2  
NLAST4052QS  
NLAST4052QSR  
TSSOP–16  
96 Units/Rail  
TSSOP–16 2500 Units/Reel  
QSOP–16  
QSOP–16  
98 Units/Rail  
2500 Units/Reel  
Semiconductor Components Industries, LLC, 2002  
1
Publication Order Number:  
June, 2002 – Rev. 2  
NLAST4052/D  

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