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NLAST4053/D

更新时间： 2024-11-19 23:53:51
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其他 - ETC 解复用器
页数 文件大小 规格书
16页 129K
描述
Analog Multiplexer/Demultiplexer

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NLAST4053/D 数据手册

 浏览型号NLAST4053/D的Datasheet PDF文件第2页浏览型号NLAST4053/D的Datasheet PDF文件第3页浏览型号NLAST4053/D的Datasheet PDF文件第4页浏览型号NLAST4053/D的Datasheet PDF文件第5页浏览型号NLAST4053/D的Datasheet PDF文件第6页浏览型号NLAST4053/D的Datasheet PDF文件第7页 
NLAST4053  
Analog Multiplexer/  
Demultiplexer  
TTL Compatible, Triple 2:1 Analog  
Switch–Multiplexer Improved Process,  
Sub–Micron Silicon Gate CMOS  
http://onsemi.com  
The NLAST4053 is an improved version of the MC14053 and  
MC74HC4053 fabricated in sub–micron Silicon Gate CMOS  
MARKING DIAGRAMS  
technology for lower R  
low current. This device may be operated either with a single supply or  
dual supply up to ±3 V to pass a 6 V signal without coupling  
capacitors.  
resistance and improved linearity with  
DS(on)  
16  
9
NLAST4053  
AWLYWW  
PP  
SO–16  
D SUFFIX  
CASE 751B  
1
8
When operating in single supply mode, it is only necessary to tie  
V , pin 7 to ground. For dual supply operation, V is tied to a  
EE  
EE  
16  
9
negative voltage, not to exceed maximum ratings. Translation is  
provided in the device, the Address and Inhibit pins are standard TTL  
level compatible. For CMOS compatibility see NLAS4053. Pin for  
pin compatible with all industry standard versions of ‘4053.’  
NLAST  
ALYW  
TSSOP–16  
DT SUFFIX  
CASE 948F  
1
8
9
• Improved R  
Specifications  
DS(on)  
• Pin for Pin Replacement for MAX4053 and MAX4053A  
– One Half the Resistance Operating at 5.0 Volts  
16  
• Single or Dual Supply Operation  
NLAST  
4053  
ALYW  
– Single 3–5 Volt Operation, or Dual ±3 Volt Operation  
– With V of 3.0 to 3.3 V, Device Can Interface with 1.8 V Logic,  
CC  
QSOP–16  
QS SUFFIX  
CASE 492  
– No Translators Needed  
– Address and Inhibit Pins are Over–Voltage Tolerant and May Be  
1
8
– Driven Up +6 V Regardless of V  
CC  
• Address and Inhibit Pins are Standard TTL Compatible  
A
L, WL  
Y
= Assembly Location  
= Wafer Lot  
= Year  
– Greatly Improved Noise Margin Over MAX4053 and MAX4053A  
– True TTL Compatibility V = 0.8 V, V = 2.0 V  
IL  
IH  
W
= Work Week  
• Improved Linearity Over Standard HC4053 Devices  
• Popular SOIC, and Space Saving TSSOP, and QSOP 16 Pin  
ORDERING INFORMATION  
Packages  
Device  
Package  
Shipping  
NLAST4053D  
SO–16  
SO–16  
48 Units/Rail  
NLAST4053DR2  
2500 Units/Reel  
NLAST4053DT  
NLAST4053DTR2  
NLAST4053QS  
NLAST4053QSR  
TSSOP–16  
96 Units/Rail  
TSSOP–16 2500 Units/Reel  
QSOP–16  
QSOP–16  
98 Units/Rail  
2500 Units/Reel  
Semiconductor Components Industries, LLC, 2002  
1
Publication Order Number:  
June, 2002 – Rev. 0  
NLAST4053/D  
1234567...16

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