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NDC7002 PDF预览

NDC7002

更新时间: 2024-11-20 22:29:07
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 晶体晶体管场效应晶体管
页数 文件大小 规格书
10页 259K
描述
Dual N-Channel Enhancement Mode Field Effect Transistor

NDC7002 数据手册

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March 1996  
NDC7002N  
Dual N-Channel Enhancement Mode Field Effect Transistor  
General Description  
Features  
These dual N-Channel enhancement mode power field  
effect transistors are produced using Fairchild's  
proprietary, high cell density, DMOS technology. This  
very high density process has been designed to minimize  
on-state resistance, provide rugged and reliable  
performance and fast switching. These devices is  
particularly suited for low voltage applications requiring a  
low current high side switch.  
0.51A, 50V, RDS(ON) = 2W @ VGS=10V  
High density cell design for low RDS(ON)  
Proprietary SuperSOTTM-6 package design using copper  
lead frame for superior thermal and electrical capabilities.  
.
High saturation current.  
____________________________________________________________________________________________  
3
2
1
4
5
6
SOT-6 (SuperSOTTM-6)  
Absolute Maximum RatingsTA = 25°C unless otherwise noted  
Symbol Parameter  
NDC7002N  
Units  
Drain-Source Voltage  
50  
20  
V
V
A
VDSS  
VGSS  
ID  
Gate-Source Voltage - Continuous  
Drain Current - Continuous  
- Pulsed  
(Note 1a)  
0.51  
1.5  
PD  
Maximum Power Dissipation  
(Note 1a)  
(Note 1b)  
0.96  
W
0.9  
(Note 1c)  
0.7  
TJ,TSTG  
Operating and Storage Temperature Range  
-55 to 150  
°C  
THERMAL CHARACTERISTICS  
Thermal Resistance, Junction-to-Ambient  
(Note 1a)  
(Note 1)  
130  
60  
°C/W  
°C/W  
R
JA  
q
Thermal Resistance, Junction-to-Case  
R
JC  
q
© 1997 Fairchild Semiconductor Corporation  
NDC7002N.SAM  

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