Datasheet > NDC7002N-SB9G007

NDC7002N-SB9G007

更新时间： 2024-10-26 21:16:39

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		/
页数	文件大小	规格书
7页	84K
描述
Transistor

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技术参数
数据手册

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NDC7002N-SB9G007 技术参数

生命周期：	Obsolete	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.84
Base Number Matches：	1

NDC7002N-SB9G007 数据手册

March 1996

NDC7002N

Dual N-Channel Enhancement Mode Field Effect Transistor

General Description

Features

These dual N-Channel enhancement mode power field

effect transistors are produced using Fairchild's

proprietary, high cell density, DMOS technology. This

very high density process has been designed to minimize

on-state resistance, provide rugged and reliable

performance and fast switching. These devices is

particularly suited for low voltage applications requiring a

low current high side switch.

0.51A, 50V, R_DS(ON)= 2W @ V_GS=10V

High density cell design for low R_DS(ON)

Proprietary SuperSOT^TM-6 package design using copper

lead frame for superior thermal and electrical capabilities.

High saturation current.

____________________________________________________________________________________________

SOT-6 (SuperSOT^TM-6)

Absolute Maximum RatingsT_A= 25°C unless otherwise noted

Symbol Parameter

NDC7002N

Units

Drain-Source Voltage

V_DSS

V_GSS

I_D

Gate-Source Voltage - Continuous

Drain Current - Continuous

- Pulsed

(Note 1a)

0.51

1.5

P_D

Maximum Power Dissipation

(Note 1a)

(Note 1b)

0.96

0.9

(Note 1c)

0.7

T_J,T_STG

Operating and Storage Temperature Range

-55 to 150

°C

THERMAL CHARACTERISTICS

Thermal Resistance, Junction-to-Ambient

(Note 1a)

(Note 1)

130

°C/W

Thermal Resistance, Junction-to-Case

NDC7002N.SAM

12 3 4 5 6 7

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