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NCP5378MNR2G PDF预览

NCP5378MNR2G

更新时间: 2024-09-19 12:56:31
品牌 Logo 应用领域
安森美 - ONSEMI 驱动器栅极栅极驱动控制器
页数 文件大小 规格书
18页 197K
描述
Single Phase Synchronous Buck Controller with Integrated Gate Drivers and Programmable DAC

NCP5378MNR2G 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFN
包装说明:HVQCCN, LCC32,.2SQ,20针数:32
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.81模拟集成电路 - 其他类型:SWITCHING CONTROLLER
控制模式:CURRENT-MODE控制技术:PULSE WIDTH MODULATION
最大输入电压:5.25 V最小输入电压:4.75 V
JESD-30 代码:S-XQCC-N32JESD-609代码:e3
长度:5 mm湿度敏感等级:1
功能数量:1端子数量:32
最高工作温度:70 °C最低工作温度:
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装等效代码:LCC32,.2SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:1 mm
子类别:Switching Regulator or Controllers表面贴装:YES
切换器配置:SINGLE温度等级:COMMERCIAL
端子面层:Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5 mm
Base Number Matches:1

NCP5378MNR2G 数据手册

 浏览型号NCP5378MNR2G的Datasheet PDF文件第2页浏览型号NCP5378MNR2G的Datasheet PDF文件第3页浏览型号NCP5378MNR2G的Datasheet PDF文件第4页浏览型号NCP5378MNR2G的Datasheet PDF文件第5页浏览型号NCP5378MNR2G的Datasheet PDF文件第6页浏览型号NCP5378MNR2G的Datasheet PDF文件第7页 
NCP5378  
Single Phase Synchronous  
Buck Controller with  
Integrated Gate Drivers and  
Programmable DAC  
http://onsemi.com  
The NCP5378 is a single chip solution which combines differential  
voltage sensing, differential phase current sensing, adaptive voltage  
positioning, and on board gate drivers to provide accurately regulated  
power for Intel processors. This controller IC maintains the same  
features as the multiphase product family, but reduces the output to a  
singlephase, for lower current systems. Low power mode operation  
combined with inductor current sensing reduces system cost by  
providing the fastest initial response to dynamic load events.  
The gate drive adaptive non overlap and power saving operation  
circuit can provide a low switching loss and high efficiency solution  
for notebook and desktop systems. A high performance operational  
error amplifier is provided to simplify compensation of the system.  
Dynamic Reference Injection further simplifies loop compensation by  
eliminating the need to compromise between closedloop transient  
response and Dynamic VID performance.  
32  
1
QFN32  
CASE 488AM  
MARKING DIAGRAM  
1
NCP5378  
AWLYYWWG  
G
A
= Assembly Location  
WL  
YY  
WW  
G
= Wafer Lot  
= Year  
= Work Week  
= PbFree Package  
Features  
Meets Intel’s VR11.1 Specifications  
High Performance Operational Error Amplifier  
Internal Soft Start  
(Note: Microdot may be in either location)  
Dynamic Reference Injection (Patent #US07057381)  
DAC Range from 0.5 V to 1.6 V  
PIN CONNECTIONS  
0.5% DAC Voltage Accuracy from 1.0 V to 1.6 V  
True Differential Remote Voltage Sensing Amplifier  
“Lossless” Differential Inductor Current Sensing  
Adaptive Voltage Positioning (AVP)  
1
VCC  
BST  
TG  
SWN  
VCCP  
BG  
VR_RDY  
IMON  
VSP  
VSN  
VFB  
COMP  
DIFFOUT  
ILIM  
Latched Over Voltage Protection (OVP)  
Guaranteed Startup into PreCharged Loads  
Threshold Sensitive Enable Pin for VTT Sensing  
Power Good Output with Internal Delays  
Thermally Compensated Current Monitoring  
Thermal Shutdown Protection  
QFN32  
(Top View)  
EN  
OFS  
AdaptiveNonOverlap Gate Drive Circuit  
Integrated MOSFET Drivers  
Automatic Powersaving Modes Maximize Efficiency during Light  
Load Operation  
ORDERING INFORMATION  
32lead QFN  
This is a PbFree Device  
Device  
NCP5378MNR2G  
Package  
Shipping  
QFN32  
2500/Tape & Reel  
(PbFree)  
Applications  
Desktop Power Supplies for Nextgeneration Intel Chipsets  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specifications  
Brochure, BRD8011/D.  
©
Semiconductor Components Industries, LLC, 2009  
1
Publication Order Number:  
October, 2009 Rev. 1  
NCP5378/D  

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