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MX29F004BQC-70G PDF预览

MX29F004BQC-70G

更新时间: 2024-11-03 15:45:47
品牌 Logo 应用领域
旺宏电子 - Macronix 内存集成电路
页数 文件大小 规格书
39页 587K
描述
Flash, 512KX8, 70ns, PQCC32, LEAD FREE, PLASTIC, MS-016, LCC-32

MX29F004BQC-70G 数据手册

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MX29F004T/B  
4M-BIT[512KX8]CMOSFLASHMEMORY  
FEATURES  
• 524,288 x 8 only  
• Erase suspend/Erase Resume  
- Suspends an erase operation to read data from, or  
program data to, another sector that is not being  
erased, then resumes the erase.  
• Single power supply operation  
- 5.0V only operation for read, erase and program op-  
eration  
• Fast access time: 70/90/120ns  
• Low power consumption  
• Status Reply  
- Data polling & Toggle bit for detection of program  
and erase cycle completion.  
- 30mA maximum active current (5MHz)  
- 1uA typical standby current  
• Chip protect/unprotect for 5V only system or 5V/12V  
system.  
• Command register architecture  
- Byte Programming (7us typical)  
- Sector Erase  
• 100,000 minimum erase/program cycles  
• Latch-up protected to 100mA from -1V to VCC+1V  
• Low VCC write inhibit is equal to or less than 3.2V  
• Package type:  
(Sector structure:16KB/8KB/8KB/32KB and 64KBx7)  
• Auto Erase (chip & sector) and Auto Program  
- Automatically erase any combination of sectors with  
Erase Suspend capability.  
- 32-pin PLCC, TSOP or PDIP  
• Compatibility with JEDEC standard  
- Pinout and software compatible with single-power  
supply Flash  
- Automatically program and verify data at specified  
address  
• 20 years data retention  
GENERAL DESCRIPTION  
The MX29F004T/B is a 4-mega bit Flash memory orga-  
nized as 512K bytes of 8 bits. MXIC's Flash memories  
offer the most cost-effective and reliable read/write non-  
volatile random access memory. The MX29F004T/B is  
packaged in 32-pin PLCC, TSOP, PDIP. It is designed  
to be reprogrammed and erased in system or in stan-  
dard EPROM programmers.  
during erase and programming, while maintaining maxi-  
mum EPROM compatibility.  
MXIC Flash technology reliably stores memory  
contents even after 100,000 erase and program  
cycles. The MXIC cell is designed to optimize the  
erase and programming mechanisms. In addition,  
the combination of advanced tunnel oxide  
processing and low internal electric fields for erase  
and program operations produces reliable cycling.  
The MX29F004T/B uses a 5.0V±10% VCC supply  
to perform the High Reliability Erase and auto  
Program/Erase algorithms.  
The standard MX29F004T/B offers access time as fast  
as 70ns, allowing operation of high-speed microproces-  
sors without wait states. To eliminate bus contention,  
the MX29F004T/B has separate chip enable (CE) and  
output enable (OE) controls.  
MXIC's Flash memories augment EPROM functionality  
with in-circuit electrical erasure and programming. The  
MX29F004T/B uses a command register to manage this  
functionality. The command register allows for 100%  
TTL level control inputs and fixed power supply levels  
The highest degree of latch-up protection is  
achieved with MXIC's proprietary non-epi process.  
Latch-up protection is proved for stresses up to 100  
milliamps on address and data pin from -1V to VCC  
+ 1V.  
P/N:PM0554  
REV. 1.9, OCT. 19, 2004  
1

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