Datasheet > MX26L6411TC-10

MX26L6411TC-10

更新时间： 2024-11-22 20:07:43

品牌	Logo	应用领域
旺宏电子 - Macronix		可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
44页	320K
描述
EEPROM

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中文翻译

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数据手册

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MX26L6411TC-10 数据手册

ADVANCED INFORMATION

MX26L6411

64M[x16] SINGLE3VPAGEMODEMTPMEMORY

FEATURES

• 2.7V to 3.6V operation voltage

• Block Structure

• High Performance

- Block erase time: 2s typ.

- 64 x 64Kword Erase Blocks

- Byte programming time: 210us typ.

- Block programming time: 0.8s typ. (using Write to

Buffer Command)

• Fast random / page mode access time

- 100/30 ns Read AccessTime (page depth:8-word)

• 128-bit Protection Register

• Program/Erase Endurance cycles: 100 cycles

- 64-bit Unique Device Identifier

- 64-bit User Programmable OTP Cells

• 16-WordWrite Buffer

Software Feature

• Support Common Flash Interface (CFI)

- MTP device parameters stored on the device and

- 14 us/word Effective Programming Time

• Enhanced Data Protection Features Absolute Protec-

tion with VPEN = GND

provide the host system to access.

• Automation Suspend Options

- Block Erase Suspend to Read

- Block Erase Suspend to Program

- Program Suspend to Read

- Flexible Block Locking

- Block Erase/Program Lockout during PowerTransi-

tions

Performance

Packaging

• Low power dissipation

- 48-LeadTSOP

- typical 15mA active current for page mode read

- 80uA/(max.) standby current

- Deep power-down current: 5uA

Technology

- Two bits per cell Nbit (0.25u) MTPTechnology

electrical erasure and programming.The device uses a

command register to manage this functionality.

GENERAL DESCRIPTION

The MXIC's MX26L6411 series MTP use the most ad-

vance 2 bits/cell Nbit technology, double the storage ca-

pacity of memory cell.The device provide the high den-

sity MTP memory solution with reliable performance and

most cost-effective.

The MXIC's Nbit technology reliably stores memory con-

tents even after the specific erase and program cycles.

The MXIC cell is designed to optimize the erase and

program mechanisms by utilizing the dielectric's charac-

ter to trap or release charges from ONO layer.

The device organized as by 16 bits of output bus. The

device is packaged in 48-Lead TSOP. It is designed to

be reprogrammed and erased in system or in standard

EPROM programmers.

The device uses a 2.7V to 3.6V VCC supply to perform

the High Reliability Erase and auto Program/Erase algo-

rithms.

The highest degree of latch-up protection is achieved

with MXIC's proprietary non-epi process. Latch-up pro-

tection is proved for stresses up to 100 milliamps on

address and data pin from -1V to VCC + 1V.

The device offers fast access time and allowing opera-

tion of high-speed microprocessors without wait states.

The device augment EPROM functionality with in-circuit

P/N:PM0947

REV. 0.1, NOV. 20, 2002

12 3 4 5 6 7...44

中文翻译

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与MX26L6411TC-10相关器件

型号	品牌	获取价格	描述	数据表
MX26L6413TC-12	Macronix	获取价格	Flash, 4MX16, 120ns, PDSO48, 12 X 20 MM, PLASTIC, MO-142, TSOP1-48
MX26L6413TC-90	Macronix	获取价格	Flash, 4MX16, 90ns, PDSO48, 12 X 20 MM, PLASTIC, MO-142, TSOP1-48
MX26L6413TI-90	Macronix	获取价格	Flash, 4MX16, 90ns, PDSO48, 12 X 20 MM, PLASTIC, MO-142, TSOP1-48
MX26L6413XBC-90	Macronix	获取价格	Flash, 4MX16, 90ns, PBGA63, 8 X 13 MM, 1.20 MM HEIGHT, 0.80 MM PITCH, PLASTIC, MO-210, CSP
MX26L6413XBI-12	Macronix	获取价格	Flash, 4MX16, 120ns, PBGA63, 8 X 13 MM, 1.20 MM HEIGHT, 0.80 MM PITCH, PLASTIC, MO-210, CS
MX26L6413XBI-90	Macronix	获取价格	Flash, 4MX16, 90ns, PBGA63, 8 X 13 MM, 1.20 MM HEIGHT, 0.80 MM PITCH, PLASTIC, MO-210, CSP
MX26L6419	Macronix	获取价格	64M [x16] SINGLE 3V PAGE MODE MTP MEMORY
MX26L6419TC-10	Macronix	获取价格	64M [x16] SINGLE 3V PAGE MODE MTP MEMORY
MX26L6420	MAXIM	获取价格	64M位[ 4Mx16 ]的CMOS多时间可编程存储器
MX26L6420	Macronix	获取价格	64M-BIT [4M x 16] CMOS MULTIPLE-TIME-PROGRAMMABLE EPROM

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