Datasheet > MX26L12711MC-10

MX26L12711MC-10

更新时间： 2024-11-22 14:54:03

品牌	Logo	应用领域
旺宏电子 - Macronix		可编程只读存储器电动程控只读存储器电可擦编程只读存储器光电二极管内存集成电路
页数	文件大小	规格书
32页	375K
描述
Flash, 8MX16, 100ns, PDSO44, 0.500 INCH, PLASTIC, MO-175, SOP-44

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MX26L12711MC-10 数据手册

MX26L12711MC

128M[x16] SINGLE3VPAGEMODEMTPMEMORY

FEATURES

• 3.0V to 3.6V operation voltage

• High Performance

• 128Mb density with two banks controled by BE0, BE1

• Block Structure

- 64 x 64Kword Erase Blocks for each bank

• Fast random / page mode access time

- 100/30 ns Read AccessTime (page depth:8-word)

• 16-WordWrite Buffer

- Block erase time: 2s typ.

- Byte programming time: 210us typ.

- Block programming time: 0.8s typ. (using Write to

Buffer Command)

• Program/Erase Endurance cycles: 10 cycles

- 14 us/word Effective Programming Time

Packaging

- 44-Lead SOP

Performance

• Low power dissipation

Technology

- typical 15mA active current for page mode read

- 160uA/(max.) standby current

- Two bits per cell Nbit (0.25u) MTP Technology

GENERAL DESCRIPTION

The MXIC's Nbit technology reliably stores memory con-

tents even after the specific erase and program cycles.

The MXIC cell is designed to optimize the erase and

program mechanisms by utilizing the dielectric's charac-

ter to trap or release charges from ONO layer.

The MXIC's MX26L12711MC MTP use the most advance

2 bits/cell Nbit technology, double the storage capacity

of memory cell.The device provide the high density MTP

memory solution with reliable performance and most cost-

effective.

The device organized as by 16 bits of output bus. The

device is packaged in 44-Lead SOP. It is designed to be

reprogrammed and erased in system or in standard

EPROM programmers.

The device uses a 3.0V to 3.6V VCC supply to perform

the High Reliability Erase and auto Program/Erase algo-

rithms.

The highest degree of latch-up protection is achieved

with MXIC's proprietary non-epi process. Latch-up pro-

tection is proved for stresses up to 100 milliamps on

address and data pin from -1V to VCC + 1V.

The device offers fast access time and allowing opera-

tion of high-speed microprocessors without wait states.

The device augment EPROM functionality with in-circuit

electrical erasure and programming.The device uses a

command register to manage this functionality.

P/N:PM0986

REV. 1.0, OCT. 29, 2003

12 3 4 5 6 7...32

中文翻译

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与MX26L12711MC-10相关器件

型号	品牌	获取价格	描述	数据表
MX26L12811MC	ETC	获取价格	128M [x8/x16] SINGLE 3V PAGE MODE MTP MEMORY
MX26L12811MC-12	ETC	获取价格	128M [x8/x16] SINGLE 3V PAGE MODE MTP MEMORY
MX26L1610MC-12G	Macronix	获取价格	MASK ROM, 1MX16, 120ns, CMOS, PDSO44
MX26L1610PC-10G	Macronix	获取价格	MASK ROM, 1MX16, 100ns, CMOS, PDIP42
MX26L1610PC-12G	Macronix	获取价格	MASK ROM, 1MX16, 120ns, CMOS, PDIP42
MX26L1610TC-10G	Macronix	获取价格	MASK ROM, 1MX16, 100ns, CMOS, PDSO48
MX26L1610TC-15G	Macronix	获取价格	MASK ROM, 1MX16, 150ns, CMOS, PDSO48
MX26L1620	Macronix	获取价格	16M-BIT [1M x 16] CMOS MULTIPLE-TIME-PROGRAMMABLE EPROM
MX26L1620MC-12	Macronix	获取价格	16M-BIT [1M x 16] CMOS MULTIPLE-TIME-PROGRAMMABLE EPROM
MX26L1620MC-90	Macronix	获取价格	16M-BIT [1M x 16] CMOS MULTIPLE-TIME-PROGRAMMABLE EPROM

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