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MTP3N50EA

更新时间: 2024-11-27 13:01:43
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 晶体晶体管功率场效应晶体管开关脉冲局域网
页数 文件大小 规格书
8页 254K
描述
3A, 500V, 3ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB

MTP3N50EA 技术参数

生命周期:Obsolete包装说明:FLANGE MOUNT, R-PSFM-T3
Reach Compliance Code:unknown风险等级:5.67
外壳连接:DRAIN配置:SINGLE
最小漏源击穿电压:500 V最大漏极电流 (ID):3 A
最大漏源导通电阻:3 ΩFET 技术:METAL-OXIDE SEMICONDUCTOR
JEDEC-95代码:TO-220ABJESD-30 代码:R-PSFM-T3
元件数量:1端子数量:3
工作模式:ENHANCEMENT MODE封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:FLANGE MOUNT
极性/信道类型:N-CHANNEL功耗环境最大值:50 W
认证状态:Not Qualified表面贴装:NO
端子形式:THROUGH-HOLE端子位置:SINGLE
晶体管元件材料:SILICONBase Number Matches:1

MTP3N50EA 数据手册

 浏览型号MTP3N50EA的Datasheet PDF文件第2页浏览型号MTP3N50EA的Datasheet PDF文件第3页浏览型号MTP3N50EA的Datasheet PDF文件第4页浏览型号MTP3N50EA的Datasheet PDF文件第5页浏览型号MTP3N50EA的Datasheet PDF文件第6页浏览型号MTP3N50EA的Datasheet PDF文件第7页 
Order this document  
by MTP3N50E/D  
SEMICONDUCTOR TECHNICAL DATA  
Motorola Preferred Device  
N–Channel Enhancement–Mode Silicon Gate  
TMOS POWER FET  
3.0 AMPERES  
500 VOLTS  
This advanced high voltage TMOS E–FET is designed to  
withstand high energy in the avalanche mode and switch efficiently.  
This new high energy device also offers a drain–to–source diode  
with fast recovery time. Designed for high voltage, high speed  
switching applications such as power supplies, PWM motor  
controls and other inductive loads, the avalanche energy capability  
is specified to eliminate the guesswork in designs where inductive  
loads are switched and offer additional safety margin against  
unexpected voltage transients.  
R
= 3.0 OHMS  
DS(on)  
D
Avalanche Energy Capability Specified at Elevated  
Temperature  
Low Stored Gate Charge for Efficient Switching  
Internal Source–to–Drain Diode Designed to Replace External  
Zener Transient Suppressor — Absorbs High Energy in the  
Avalanche Mode  
G
S
Source–to–Drain Diode Recovery Time Comparable to Discrete  
Fast Recovery Diode  
CASE 221A–06, Style 5  
TO–220AB  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
C
Rating  
Symbol  
Value  
500  
Unit  
Vdc  
Vdc  
Drain–Source Voltage  
V
DSS  
Drain–Gate Voltage (R  
= 1.0 M)  
Gate–Source Voltage — Continuous  
V
DGR  
500  
GS  
V
±20  
±40  
Vdc  
Vpk  
GS  
Gate–Source Voltage — Non–repetitive (t 50 µs)  
V
GSM  
p
Drain Current — Continuous  
Drain Current — Pulsed  
I
3.0  
10  
Adc  
D
I
DM  
Total Power Dissipation @ T = 25°C  
Derate above 25°C  
P
D
50  
0.4  
Watts  
W/°C  
C
Operating and Storage Temperature Range  
T , T  
65 to 150  
°C  
J
stg  
UNCLAMPED DRAIN–TO–SOURCE AVALANCHE CHARACTERISTICS (T < 150°C)  
J
Single Pulse Drain–to–Source Avalanche Energy — T = 25°C  
W
W
(1)  
(2)  
210  
33  
5.0  
mJ  
J
DSR  
Single Pulse Drain–to–Source Avalanche Energy — T = 100°C  
J
Repetitive Pulse Drain–to–Source Avalanche Energy  
DSR  
THERMAL CHARACTERISTICS  
Thermal Resistance — Junction to Case°  
— Junction to Ambient°  
R
R
2.5  
62.5  
°C/W  
°C  
θJC  
θJA  
Maximum Lead Temperature for Soldering Purposes, 1/8from case for 10 seconds  
T
260  
L
(1) V  
DD  
= 50 V, I = 3.0 A  
D
(2) Pulse Width and frequency is limited by T (max) and thermal response  
J
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit  
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.  
E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.  
Preferred devices are Motorola recommended choices for future use and best overall value.  
REV 1  
Motorola, Inc. 1996  

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