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MT90869AG PDF预览

MT90869AG

更新时间: 2024-11-23 21:21:11
品牌 Logo 应用领域
美高森美 - MICROSEMI 电信电信集成电路
页数 文件大小 规格书
84页 582K
描述
Digital Time Switch, CMOS, PBGA272, 27 X 27 MM, 1.27 MM PITCH, PLASTIC, MS-034BAL-2, BGA-272

MT90869AG 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:BGA
包装说明:BGA, BGA272,20X20,50针数:272
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.57JESD-30 代码:S-PBGA-B272
JESD-609代码:e0长度:27 mm
功能数量:1端子数量:272
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装等效代码:BGA272,20X20,50封装形状:SQUARE
封装形式:GRID ARRAY峰值回流温度(摄氏度):NOT SPECIFIED
电源:1.8,3.3 V认证状态:Not Qualified
座面最大高度:2.32 mm子类别:Other Telecom ICs
标称供电电压:1.8 V表面贴装:YES
技术:CMOS电信集成电路类型:DIGITAL TIME SWITCH
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:BALL端子节距:1.27 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:27 mmBase Number Matches:1

MT90869AG 数据手册

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MT90869  
Flexible 16 K Digital Switch (F16kDX)  
Data Sheet  
December 2010  
Features  
Ordering Information  
16,384-channel x 16,384-channel non-blocking  
unidirectional switching.The Backplane and  
Local inputs and outputs can be combined to  
form a non-blocking switching matrix with 64  
stream inputs and 64 stream outputs  
MT90869AG  
MT90869AG2  
272 Ball PBGA  
272 Ball PBGA*  
Trays  
Trays  
*Pb Free Tin/Silver/Copper  
-40 to +85oC  
8,192-channel x 8,192-channel non-blocking  
Backplane to Local stream switch  
*Note: the package thickness is different than the  
MT90869AG (see drawing at the end of the data  
sheet).  
8,192-channel x 8,192-channel non-blocking  
Local to Backplane stream switch  
Local port accepts 32 ST-BUS streams with  
data rates of 2.048 Mb/s, 4.096 Mb/s,  
8,192-channel x 8,192-channel non-blocking  
Backplane input to Backplane output switch  
8.192 Mb/s or 16.384 Mb/s, in any combination  
8,192-channel x 8,192-channel non-blocking  
Local input to Local output stream switch  
Per-stream channel and bit delay for Local input  
streams  
Rate conversion on all data paths, Backplane to  
Local, Local to Backplane, Backplane to  
Backplane and Local to Local streams  
Per-stream channel and bit delay for Backplane  
input streams  
Per-stream advancement for Local output  
streams  
Backplane port accepts 32 ST-BUS streams  
with data rates of 2.048 Mb/s, 4.096 Mb/s,  
8.192 Mb/s or 16.384 Mb/s in any combination,  
or a fixed allocation of 16 streams at  
32.768 Mb/s  
Per-stream advancement for Backplane output  
streams  
Constant throughput delay for frame integrity  
V
V
V
RESET  
ODE  
DD_IO  
DD_CORE  
SS (GND)  
Backplane Data Memories  
(8,192 channels)  
BSTi0-31  
LSTi0-31  
Backplane  
Interface  
Backplane  
Connection Memory  
(8,192 locations)  
Local  
Connection Memory  
(8,192 locations)  
Local  
Interface  
LSTo0-31  
LCST0-3  
BSTo0-31  
BCST0-3  
BORS  
Local Data Memories  
(8,192 channels)  
LORS  
FP8o  
Backplane  
Timing Unit  
FP8i  
Local  
Timing  
Unit  
FP16o  
C8o  
C16o  
PLL  
Microprocessor Interface  
and Internal Registers  
Test Port  
C8i  
V
DD_PLL  
TMS TDi TDo TCK TRST  
DS CS R/W A14-A0 DTA D15-D0  
Figure 1 - MT90869 Functional Block Diagram  
1
Zarlink Semiconductor Inc.  
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.  
Copyright 2002-2010, Zarlink Semiconductor Inc. All Rights Reserved.  
 

MT90869AG 替代型号

型号 品牌 替代类型 描述 数据表
MT90869AG2 MICROSEMI

完全替代

Digital Time Switch, CMOS, PBGA272, 27 X 27 MM, 1.27 MM PITCH, LEAD FREE, PLASTIC, MS-034B

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