Datasheet > MPF7100BVMA1ES

MPF7100BVMA1ES

更新时间： 2024-11-12 02:48:35

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
125页	1205K
描述
7-channel power management integrated circuit for high performance applications

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MPF7100BVMA1ES 数据手册

PF7100

7-channel power management integrated circuit for high

performance applications

Rev. 4 — 9 March 2021

Product data sheet

1 Overview

The PF7100 is a power management integrated circuit (PMIC) designed for high

performance i.MX 8 processors. It features five high efficiency buck converters and two

linear regulators for powering the processor, memory, and miscellaneous peripherals.

Built-in one-time programmable memory stores key startup configurations, drastically

reducing external components typically used to set output voltage and sequence of

external regulators. Regulator parameters are adjustable through high-speed I²C after

startup offering flexibility for different system states.

2 Features

• Five high efficiency buck converters

• Two linear regulators with load switch options

• Watchdog timer/monitor

• Monitoring circuit to fit ASIL B safety level

• One-time programmable device configuration

• 3.4 MHz I²C communication interface

• 48-pin 7×7 mm QFN package

3 Simplified application diagram

PF7100

i.MX8xXL

VIN:

2.7 V to 5.5 V

VSNVS1

(3.0 V @ 10 mA)

VDD_SNVS_3P0

BUCK1

(1.0 V @ 2.5 A)

VDD_MAIN

VDD_MEMC

VDD_DDR_VDDQ

VDD_1P8

BUCK2

(1.0 V/1.1 V @ 2.5 A)

BUCK4

(1.1 V/1.35 V @ 2.5 A)

BUCK5

(1.8 V @ 2.5 A)

LDO1

1.8 V @ 0.4 A)

VDD_ANA_1P8

VDD_SD

(

LDO2

(3.3 V @ 0.4 A)

BUCK3 (VTT)

(0.4 V - 1.8 V @ 2.5 A)

to peripherals

DDR memory

VSNVS2

(1.8 V @ 10 mA)

aaa-034294

Figure 1.ꢀSimplified application diagram

12 3 4 5 6 7...125

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