Datasheet > MPC860TVR80D4

MPC860TVR80D4

更新时间： 2024-01-18 18:37:01

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
78页	529K
描述
PowerQUICC, 32 Bit Power Architecture, 80MHz, Communications Processor, 0 to 95C

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数据手册

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MPC860TVR80D4 数据手册

Features

•

System integration unit (SIU)

— Bus monitor

— Software watchdog

— Periodic interrupt timer (PIT)

— Low-power stop mode

— Clock synthesizer

— Decrementer, time base, and real-time clock (RTC)

— Reset controller

— IEEE 1149.1™ Std. test access port (JTAG)

Interrupts

•

— Seven external interrupt request (IRQ) lines

— 12 port pins with interrupt capability

— 23 internal interrupt sources

— Programmable priority between SCCs

— Programmable highest priority request

•

10/100 Mbps Ethernet support, fully compliant with the IEEE 802.3u® Standard (not available

when using ATM over UTOPIA interface)

ATM support compliant with ATM forum UNI 4.0 specification

— Cell processing up to 50–70 Mbps at 50-MHz system clock

— Cell multiplexing/demultiplexing

— Support of AAL5 and AAL0 protocols on a per-VC basis. AAL0 support enables OAM and

software implementation of other protocols.

— ATM pace control (APC) scheduler, providing direct support for constant bit rate (CBR) and

unspecified bit rate (UBR) and providing control mechanisms enabling software support of

available bit rate (ABR)

— Physical interface support for UTOPIA (10/100-Mbps is not supported with this interface) and

byte-aligned serial (for example, T1/E1/ADSL)

— UTOPIA-mode ATM supports level-1 master with cell-level handshake, multi-PHY (up to four

physical layer devices), connection to 25-, 51-, or 155-Mbps framers, and UTOPIA/system

clock ratios of 1/2 or 1/3.

— Serial-mode ATM connection supports transmission convergence (TC) function for

T1/E1/ADSL lines, cell delineation, cell payload scrambling/descrambling, automatic

idle/unassigned cell insertion/stripping, header error control (HEC) generation, checking, and

statistics.

•

Communications processor module (CPM)

— RISC communications processor (CP)

— Communication-specific commands (for example, GRACEFUL STOP TRANSMIT, ENTER HUNT

MODE, and RESTART TRANSMIT)

— Supports continuous mode transmission and reception on all serial channels

MPC860 PowerQUICC Family Hardware Specifications, Rev. 9

Freescale Semiconductor

1 2 345 6 7...78

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