Datasheet > MPC8306S

MPC8306S

更新时间： 2024-09-17 10:49:35

品牌	Logo	应用领域
飞思卡尔 - FREESCALE		/
页数	文件大小	规格书
2页	249K
描述
PowerQUICC II Pro Processor

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

MPC8306S 数据手册

Integrated Communications Processors

MPC8309 PowerQUICC II Pro Processor

Overview

MPC8309 Block Diagram

The MPC8309 processor is part of the entry

level MPC830x communications portfolio based

on the e300 core architecture. It addresses

e300 Core

Complex

the requirements of networking applications,

16/32-bit DDR2

Controller

including I/O cards for low-end base stations,

16 KB

D-Cache

16 KB

I-Cache

low-end Ethernet switches, residential

gateways, modem/routers, industrial control,

factory automation and test and measurement

applications. The MPC830x portfolio extends

current PowerQUICC processor offerings,

delivering an impressive 1.99 DMIPS/MHz

in CPU performance, additional functionality

and faster interfaces while maintaining

Local Bus

QUICC Engine

Coherent System Bus

2 x DUART

I²C, SPI

Up to

3 x RMII/MII

4 x

CAN

8-bit

GPIO, Interrupt

Controller

2 x HDLC

/TDM

USB

2.0

eSDHC

8-bit

DMA

PCI

code compatibility with PowerQUICC I

2 x with

and PowerQUICC II processors. MPC830x

processors also provide sub-$10, low power

consumption, a compact board footprint and a

time to market advantage through cost-effective

evaluation kits with optimized BSP and drivers.

IEEE^®1588

16-bit GPIO

Core

Accelerators

I/O

Core Complex

The MPC8309 incorporates the e300c3

with ECC support, 4 x CAN, 4 x UARTs,

High-Speed USB 2.0 controller, enhanced

SDHC controller, a 32-bit peripheral

component interconnect (PCI) controller,

a 16-bit local bus and two direct memory

access controllers (DMAC).

MPC8309 Features

•ꢀ Excellentꢀperformance,ꢀlow-power,ꢀsub-$10ꢀ

(MPC603e-based) core, built on Power

communications processor

Architecture technology, which includes 16 KB

•ꢀ Theꢀe300ꢀcore,ꢀbuiltꢀonꢀPowerꢀArchitectureꢀ

technology, with dual integer units enables

more efficient operations to be conducted

in parallel, resulting in a significant

of L1 instruction and data caches, dual integer

units and on-chip memory management units

(MMUs).

In summary, the MPC8309 provides users

with a highly integrated, fully programmable

communications processor helping to ensure

that a cost-effective system solution can be

quickly developed while offering the flexibility

to accommodate new standards and evolving

system requirements.

performance improvement

QUICC Engine Technology

A communications complex based on

•ꢀ Theꢀsingle-RISCꢀQUICCꢀEngineꢀ

communications module offers a future-

proof solution for next-generation designs

by supporting programmable protocol

termination and network interface

termination to meet evolving

QUICC Engine technology forms the heart

of the networking capability of the MPC830x

portfolio. The QUICC Engine block contains

several peripheral controllers and a 32-bit

RISC controller. Protocol support is provided

by the main workhorses of the device—the

unified communication controllers (UCCs).

Each of the five UCCs can support a variety

of communication protocols, including 10/100

Mbps Ethernet and high-level data link control

(HDLC). Two of the UCCs can also support

IEEE^®1588 version-2 time stamping.

protocol standards

•ꢀ DDR2ꢀmemoryꢀcontroller—oneꢀ16/32-bitꢀ

interface at up to 333 MHz with

ECC support

•ꢀ Peripheralꢀinterfacesꢀsuchꢀasꢀ32-bit,ꢀ66ꢀ

MHz PCI, 16-bit, 66 MHz local bus interface

and High-Speed USB 2.0, 4 x CAN, 4 x

UARTs, enhanced SDHC controller

System Interface Unit

The MPC8309 processor also includes a 16/32-

bit double data rate (DDR2) memory controller

中文翻译

下载PDF

与MPC8306S相关器件

型号	品牌	获取价格	描述	数据表
MPC8306SCVMABDCA	NXP	获取价格	PowerQUICC, Power Arch SoC, 133MHz, DDR2, HDLC, TDM, Enet, USB, -40 to 105C, Rev 1.1
MPC8306SCVMACDCA	NXP	获取价格	PowerQUICC, Power Arch SoC, 200MHz, DDR2, HDLC, TDM, Enet, USB, -40 to 105C, Rev 1.1
MPC8306SCVMADDCA	NXP	获取价格	PowerQUICC, Power Arch SoC, 266MHz, DDR2, HDLC, TDM, Enet, USB, -40 to 105C, Rev 1.1
MPC8306SCVMAFDCA	NXP	获取价格	PowerQUICC, Power Arch SoC, 333MHz, DDR2, HDLC, TDM, Enet, USB, -40 to 105C, Rev 1.1
MPC8306SEC	FREESCALE	获取价格	PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications
MPC8306SVMABDCA	NXP	获取价格	PowerQUICC, Power Arch SoC, 133MHz, DDR2, HDLC, TDM, Enet, USB, 0 to 105C, Rev 1.1
MPC8306SVMACDCA	NXP	获取价格	PowerQUICC, Power Arch SoC, 200MHz, DDR2, HDLC, TDM, Enet, USB, 0 to 105C, Rev 1.1
MPC8306SVMADDCA	NXP	获取价格	PowerQUICC, Power Arch SoC, 266MHz, DDR2, HDLC, TDM, Enet, USB, 0 to 105C, Rev 1.1
MPC8306SVMAFDCA	NXP	获取价格	PowerQUICC, Power Arch SoC, 333MHz, DDR2, HDLC, TDM, Enet, USB, 0 to 105C, Rev 1.1
MPC8306VMABDCA	NXP	获取价格	PowerQUICC, Power Arch SoC, 133MHz, DDR2, HDLC, TDM, Enet, USB, CAN, 0 to 105C, Rev 1.1

与MPC8306S相关文章

摩尔斯微电子在美国约书亚树国家公园测试 Wi-Fi HaLow
2024-09-18

15
贸泽上架Tallysman TW5386智能GNSS天线
2024-09-18

14
SL74HC10N：高性能三输入与非门解析
2024-09-03

93
AIC1781A 电池充电控制器深度解析
2024-09-03

82

产品中心

服务支持

精选活动

关于我们

帮助中心

MPC8306S

MPC8306S 数据手册

与MPC8306S相关器件

与MPC8306S相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

MPC8306S

MPC8306S 数据手册

与MPC8306S相关器件

与MPC8306S相关文章

您还可以找

您在本页遇到什么问题？